公开(公告)号：US20130188701A1

公开(公告)日：2013-07-25

申请号：US13744128

申请日：2013-01-17

Applicant: Qualcomm Incorporated

Inventor： Sanjeev Kumar ,  Hsiao-Chiang Chuang ,  Shu Xiao ,  Kai Wang ,  Vladan Andrijanic ,  Xianglin Wang ,  Wei-Jung Chien ,  Marta Karczewicz ,  Vadim Seregin

IPC: H04N7/26

CPC classification number: H04N19/50 ,  H04N19/11 ,  H04N19/156 ,  H04N19/174 ,  H04N19/436

Abstract: The techniques of this disclosure are generally related to parallel coding of video units that reside along rows or columns of blocks in largest coding units. For example, the techniques include removing intra-prediction dependencies between two video units in different rows or columns to allow for parallel coding of rows or columns of the video units.

Abstract translation: 本公开的技术通常涉及以最大编码单元沿着行或列的行驻留的视频单元的并行编码。 例如，这些技术包括去除不同行或列中的两个视频单元之间的帧内预测依赖性，以允许视频单元的行或列的并行编码。

公开(公告)号：US10277904B2

公开(公告)日：2019-04-30

申请号：US14839666

申请日：2015-08-28

Applicant: QUALCOMM Incorporated

Inventor： Shu Lin ,  Mang Li ,  Kai Wang ,  Atul Garg

IPC: H04N19/15 ,  H04N19/152 ,  H04N19/66 ,  H04N19/88 ,  H04N19/423 ,  H04N19/433

Abstract: Video pixel line buffers are widely used for data processing in video codecs. Video data may be packed into buffers configured to store a plurality of words, each word comprising a series of bits. The video data may be associated with two or more channels. In order to reduce realization costs, data blocks from two different channels may be packed from opposite sides of a word in the buffer in opposite directions. In some embodiments, data blocks from two or more physical channels may be mapped to two or more virtual channels, the virtual channels having balanced data block sizes. The data blocks associated with the virtual channels may then be packed to one or more buffers.

公开(公告)号：US20180278948A1

公开(公告)日：2018-09-27

申请号：US15467841

申请日：2017-03-23

Applicant: QUALCOMM Incorporated

Inventor： Yasutomo Matsuba ,  Hariharan Ganesh Lalgudi ,  Yunqing Chen ,  Vladan Andrijanic ,  Shyamprasad Chikkerur ,  Harikrishna Reddy ,  Kai Wang

IPC: H04N19/513 ,  H04N19/15 ,  H04N19/159 ,  H04N19/436 ,  H04N19/91 ,  H04N19/124

CPC classification number: H04N19/513 ,  H04N19/124 ,  H04N19/15 ,  H04N19/159 ,  H04N19/172 ,  H04N19/174 ,  H04N19/176 ,  H04N19/182 ,  H04N19/184 ,  H04N19/423 ,  H04N19/436 ,  H04N19/91

Abstract: Example video encoding techniques are described. A video encoder may generate residual data for macroblocks for tiles of a current frame. Each tile includes a plurality of macroblocks, each tile is independently encoded from the other tiles of the current frame, and a width of each tile is less than a width of the current frame. The video encoder may store the residual data in buffers. Each buffer is associated with one or more tiles, and each buffer is configured to store residual data for macroblocks for the one or more tiles with which each buffer is associated. The video encoder may read the residual data from the plurality of buffers for macroblocks of an entire row of the current frame before reading residual data from the plurality of buffers for macroblocks of any other row of the current frame, and encode values based on the read residual data.

公开(公告)号：US20140169483A1

公开(公告)日：2014-06-19

申请号：US13720499

申请日：2012-12-19

Applicant: QUALCOMM INCORPORATED

Inventor： Sanjeev Kumar ,  Geert Van der Auwera ,  Kai Wang ,  Shu Xiao ,  Marta Karczewicz

IPC: H04N7/26

CPC classification number: H04N19/423 ,  H04N19/80 ,  H04N19/82

Abstract: An apparatus configured to filter video information according to certain aspects includes a memory unit and a processor in communication with the memory unit. The memory unit stores video information comprising at least two adjacent video blocks, each video block comprising a plurality of video samples, and each video sample having a bit depth. The processor determines a filtered video sample based at least in part on a video sample and an adjustment value. The processor determines the adjustment value at least in part from an input with a limited bit depth. The input is determined from a set of one or more video samples, and its bit depth is limited such that it is less than the bit depth of the one or more video samples.

Abstract translation: 被配置为根据某些方面对视频信息进行滤波的装置包括存储器单元和与存储器单元通信的处理器。 存储单元存储包括至少两个相邻视频块的视频信息，每个视频块包括多个视频样本，并且每个视频样本具有位深度。 处理器至少部分地基于视频样本和调整值来确定经滤波的视频样本。 处理器至少部分地从具有有限位深度的输入端确定调整值。 输入是从一组一个或多个视频样本确定的，并且其位深度受到限制，使得它小于一个或多个视频采样的位深度。