公开(公告)号：US09973182B2

公开(公告)日：2018-05-15

申请号：US15265217

申请日：2016-09-14

Applicant: QUALCOMM Incorporated

Inventor： Animesh Paul ,  Jingcheng Zhuang ,  Xinhua Chen ,  Ravi Sridhara

IPC: H03K21/00 ,  H03K23/00 ,  H03K25/00 ,  H03K5/156 ,  H03K21/02

CPC classification number: H03K5/1565 ,  H03K21/02

Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for generating clock signals. For example, certain aspects of the present disclosure provide a clock generation circuit. The clock generation circuit may include a first transistor connected in cascode with a second transistor, wherein an input clock node of the circuit is coupled to gates of the first and second transistors. The clock generation circuit may also include a frequency divider circuit having an input coupled to the input clock node, wherein an output of the frequency divider circuit is coupled to a source of the second transistor, and wherein an output node of the circuit is coupled to drains of the first and second transistors.