公开(公告)号：US09755069B2

公开(公告)日：2017-09-05

申请号：US15140888

申请日：2016-04-28

Applicant: Renesas Electronics Corporation

Inventor： Hiroki Fujii

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423

CPC classification number: H01L29/7825 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66659 ,  H01L29/66704 ,  H01L29/7816 ,  H01L29/7835

Abstract: There is provided a semiconductor device having LDMOS transistors embedded in a semiconductor substrate to boost source-drain breakdown voltage, with arrangements to prevent fluctuations of element characteristics caused by electric field concentration so that the reliability of the semiconductor device is improved. A trench is formed over the upper surface of a separation insulating film of each LDMOS transistor, the trench having a gate electrode partially embedded therein. This structure prevents electric field concentration in the semiconductor substrate near the source-side edge of the separation insulating film.

公开(公告)号：US20150243777A1

公开(公告)日：2015-08-27

申请号：US14619194

申请日：2015-02-11

Applicant: Renesas Electronics Corporation

Inventor： Hiroki Fujii

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/06

CPC classification number: H01L29/7825 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66659 ,  H01L29/66704 ,  H01L29/7816 ,  H01L29/7835

Abstract: There is provided a semiconductor device having LDMOS transistors embedded in a semiconductor substrate to boost source-drain breakdown voltage, with arrangements to prevent fluctuations of element characteristics caused by electric field concentration so that the reliability of the semiconductor device is improved. A trench is formed over the upper surface of a separation insulating film of each LDMOS transistor, the trench having a gate electrode partially embedded therein. This structure prevents electric field concentration in the semiconductor substrate near the source-side edge of the separation insulating film.

Abstract translation: 提供了一种半导体器件，其具有嵌入在半导体衬底中的LDMOS晶体管，以提高源 - 漏击穿电压，具有防止由电场浓度引起的元件特性波动的设置，从而提高半导体器件的可靠性。 在每个LDMOS晶体管的分离绝缘膜的上表面上形成沟槽，沟槽具有部分地嵌入其中的栅电极。 这种结构防止了在分离绝缘膜的源极边缘附近的半导体衬底中的电场集中。