公开(公告)号：US06691217B2

公开(公告)日：2004-02-10

申请号：US09864116

申请日：2001-05-24

申请人： Bruce Leroy Beukema ,  David F. Craddock ,  Thomas Anthony Gregg ,  Renato John Recio

发明人： Bruce Leroy Beukema ,  David F. Craddock ,  Thomas Anthony Gregg ,  Renato John Recio

IPC分类号： G06F1200

CPC分类号： G06F12/0261 ,  G06F12/1081 ,  Y10S707/99953 ,  Y10S707/99956

摘要： A method, program and system for associating memory windows with memory regions in an infiniband data storage system are provided. The invention comprises registering a Memory Region, wherein the Memory Region is a set of virtually contiguous memory addresses defined by a virtual address and length. The system then establishes and maintains a Window Reference Count (WRC) for the Memory Region, which tracks the number of Memory Windows which are bound to the Memory Region. When the system binds a Memory Window to the Memory Region, the value of the WRC is incremented. When a Memory Window is unbound from the Memory Region, the value of the WRC is decremented. If no Memory Windows are bound to the Memory Region, the value of the WRC is zero. The Memory Region is not deregistered unless the value of the WRC equals zero.

摘要翻译： 提供了一种用于将存储器窗口与无限数据存储系统中的存储器区域相关联的方法，程序和系统。 本发明包括登记存储器区域，其中存储器区域是由虚拟地址和长度定义的一组虚拟连续的存储器地址。 然后，系统建立并维护用于内存区域的窗口引用计数（WRC），该区域跟踪绑定到内存区域的内存窗口的数量。 当系统将内存窗口绑定到内存区域时，WRC的值将增加。 当存储器窗口从存储器区域中取消绑定时，WRC的值递减。 如果没有内存Windows绑定到内存区域，则WRC的值为零。 除非WRC的值等于零，否则内存区域不会被注销。

公开(公告)号：US06748499B2

公开(公告)日：2004-06-08

申请号：US09998403

申请日：2001-11-15

申请人： Bruce Leroy Beukema ,  David F. Craddock ,  Thomas Anthony Gregg ,  Renato John Recio

发明人： Bruce Leroy Beukema ,  David F. Craddock ,  Thomas Anthony Gregg ,  Renato John Recio

IPC分类号： G06F1214

CPC分类号： G06F12/1081 ,  G06F12/1475

摘要： A method, computer program product, and data processing system for sharing memory protection tables and address translation tables among multiple Host Channel Adapters are disclosed. The protection and address translation tables for a shared memory region are written in memory of the host. The Host Channel Adapters are registered with the memory region so that each adapter stores an address pointer to the tables. In this way, the tables need not be duplicated for each adapter.

摘要翻译： 公开了一种用于在多个主机通道适配器之间共享存储器保护表和地址转换表的方法，计算机程序产品和数据处理系统。 共享存储器区域的保护和地址转换表被写入主机的存储器中。 主机通道适配器已在内存区域注册，以便每个适配器都存储一个地址指针给表。 这样，每个适配器不需要重复表。

公开(公告)号：US07574537B2

公开(公告)日：2009-08-11

申请号：US11050332

申请日：2005-02-03

申请人： Richard Louis Arndt ,  David F. Craddock ,  Thomas Anthony Gregg ,  Donald William Schmidt

发明人： Richard Louis Arndt ,  David F. Craddock ,  Thomas Anthony Gregg ,  Donald William Schmidt

IPC分类号： G06F3/00

CPC分类号： G06F13/28

摘要： A method, apparatus, and computer program product are disclosed in a data processing system for migrating data pages subject to DMA access by temporarily disabling selected DMA operations within a physical I/O adapter. A determination is made as to whether to disable data access DMA capabilities of the physical I/O adapter. An operating mode of the physical I/O adapter is set to a particular mode utilizing a mode bit according to the determination of whether to disable data access DMA capabilities. Only data access DMA capabilities of the physical I/O adapter are disabled when the mode bit is set. Administrative services operations continue to be performed by the physical I/O adapter when the data access DMA capabilities of the physical I/O adapter are disabled.

摘要翻译： 在数据处理系统中公开了一种方法，装置和计算机程序产品，用于通过临时禁用物理I / O适配器内的所选DMA操作来迁移受DMA访问的数据页。 确定是否禁用物理I / O适配器的数据访问DMA功能。 根据是否禁止数据访问DMA能力的确定，使用模式位将物理I / O适配器的操作模式设置为特定模式。 当模式位置1时，只有物理I / O适配器的数据访问DMA功能被禁用。 当物理I / O适配器的数据访问DMA功能被禁用时，管理服务操作将继续由物理I / O适配器执行。

公开(公告)号：US07149220B2

公开(公告)日：2006-12-12

申请号：US10132456

申请日：2002-04-25

申请人： Bruce Leroy Beukema ,  Thomas Anthony Gregg ,  Danny Marvin Neal ,  Renato John Recio

发明人： Bruce Leroy Beukema ,  Thomas Anthony Gregg ,  Danny Marvin Neal ,  Renato John Recio

IPC分类号： H04L12/56

CPC分类号： H04L29/06 ,  H04L49/90 ,  H04L69/326

摘要： A method, system, and product in a data processing system are disclosed for managing data transmitted from a first end node to a second end node included in the data processing system. A logical connection is established between the first end node and the second end node prior to transmitting data between the end nodes. An instance number is associated with this particular logical connection. The instance number is included in each packet transmitted between the end nodes while this logical connection remains established. The instance number remains constant during this logical connection. The instance number is altered, such as by incrementing it, each time a logical connection between these end nodes is reestablished. Thus, each packet is associated with a particular instance of the logical connection. When a packet is received, the instance number included in the packet may be used to determine whether the packet is a stale packet transmitted during a previous logical connection between these end nodes.

公开(公告)号：US06725296B2

公开(公告)日：2004-04-20

申请号：US09915663

申请日：2001-07-26

申请人： David F. Craddock ,  Thomas Anthony Gregg ,  Ian David Judd ,  Gregory Francis Pfister ,  Renato John Recio ,  Donald William Schmidt

发明人： David F. Craddock ,  Thomas Anthony Gregg ,  Ian David Judd ,  Gregory Francis Pfister ,  Renato John Recio ,  Donald William Schmidt

IPC分类号： G06F300

CPC分类号： G06F9/4806

摘要： An apparatus and method for managing work and completion queues using head and tail circular pointers. With the apparatus and method, queue head and tail pointers are maintained in the channel interface and the host channel adapter. The head and tail pointers in the host channel adapter include a queue pointer table index and a queue page index for identifying a position within the queue. For work queues, the tail pointer in the channel interface is used to identify a next position where a work queue entry may be written. The head pointer in the channel interface is used only to determine whether the work queue is full or not. The head pointer in the host channel adapter is used to identify a next work queue entry for processing by the host channel adapter. The tail pointer in the host channel adapter is used by the host channel adapter to determine if the queue is empty. For completion queues, the head pointer in the channel interface is used to identify a next completion queue entry to be processed. The tail pointer in the host channel adapter is used to identify a next position in the completion queue to which the host channel adapter may post a completion queue entry.

摘要翻译： 一种使用头尾循环指针管理工作和完成队列的装置和方法。 使用设备和方法，在通道接口和主机通道适配器中维护队列头尾指针。 主机通道适配器中的头和尾指针包括队列指针表索引和用于标识队列中的位置的队列页索引。 对于工作队列，通道接口中的尾部指针用于标识可以写入工作队列条目的下一个位置。 通道接口中的头指针仅用于确定工作队列是否已满。 主机通道适配器中的头指针用于标识下一个工作队列条目以供主机通道适配器处理。 主机通道适配器中的尾部指针由主机通道适配器使用，以确定队列是否为空。 对于完成队列，通道接口中的头指针用于标识要处理的下一个完成队列条目。 主机通道适配器中的尾部指针用于标识完成队列中的下一个位置，主机通道适配器可以向其发布完成队列条目。

公开(公告)号：US07093024B2

公开(公告)日：2006-08-15

申请号：US09965005

申请日：2001-09-27

申请人： David F. Craddock ,  David Arlen Elko ,  Thomas Anthony Gregg ,  Gregory Francis Pfister ,  Renato John Recio ,  Donald William Schmidt

发明人： David F. Craddock ,  David Arlen Elko ,  Thomas Anthony Gregg ,  Gregory Francis Pfister ,  Renato John Recio ,  Donald William Schmidt

IPC分类号： G06F15/173

CPC分类号： H04L45/00 ,  H04L45/586

摘要： A mechanism for allowing a single physical IB node to virtualize a plurality of host channel adapters is provided. This includes providing the appearance of both a router and multiple virtual HCA's residing behind that router, to the external REAL subnet components. Each virtual host channel adapter will have unique access control levels. One or more InfiniBand subnets are virtualized in such a way that nodes residing both within the virtual subnets and in separate physical subnets are completely unaware of the virtualization. This virtualization of InfiniBand subnets significantly increases the horizontal scaling capabilities of a single InfiniBand physical component, while at the same time provides “native” network throughput for all the virtual hosts.

公开(公告)号：US06834332B2

公开(公告)日：2004-12-21

申请号：US09942632

申请日：2001-08-30

申请人： David F. Craddock ,  Thomas Anthony Gregg ,  Renato John Recio ,  Donald William Schmidt

发明人： David F. Craddock ,  Thomas Anthony Gregg ,  Renato John Recio ,  Donald William Schmidt

IPC分类号： G06F1300

CPC分类号： G06F12/12 ,  G06F12/1081

摘要： An apparatus and method for swapping out real memory by inhibiting input/output (I/O) operations to a memory region are provided. The apparatus and method provide a mechanism in which a quiesce indicator is provided in a field containing the current outstanding I/O count associated with the memory region whose real memory is to be swapped out. The current I/O field and the quiesce indicator are used as a means for communicating between a shared resource arbitrator and a guest consumer. When the quiesce indicator is set, the guest consumer is informed that it should not send any further I/O operations to that memory region. When the number of pending I/O operations against the memory region is zero, a valid bit in a protection table is set to invalid, and the real memory associated with the memory region may be swapped out. Thereafter, when the memory region is swapped back in, an address translation table is updated, the valid bit is reset, and the quiesce indicator is reset so that further I/O operations to the memory region may occur.

摘要翻译： 提供了通过禁止对存储器区域的输入/输出（I / O）操作来交换实际存储器的装置和方法。 该装置和方法提供了一种机制，其中在包含与要实际存储器被换出的存储器区域相关联的当前未完成的I / O计数的字段中提供静默指示符。 当前的I / O域和静默指示符用作在共享资源仲裁器和客户消费者之间进行通信的手段。 当设置了静默指示符时，通知客户不要向该存储器区域发送任何进一步的I / O操作。 当对存储器区域的未决I / O操作的数量为零时，保护表中的有效位被设置为无效，并且与存储器区域相关联的实际存储器可以被换出。 此后，当存储器区域被交换回来时，地址转换表被更新，有效位被复位，并且静默指示器被复位，使得可能发生对存储器区域的进一步的I / O操作。

公开(公告)号：US07092401B2

公开(公告)日：2006-08-15

申请号：US09999144

申请日：2001-11-15

申请人： David F. Craddock ,  Thomas Anthony Gregg ,  Ian David Judd ,  Gregory Francis Pfister ,  Renato John Recio

发明人： David F. Craddock ,  Thomas Anthony Gregg ,  Ian David Judd ,  Gregory Francis Pfister ,  Renato John Recio

IPC分类号： H04L12/28 ,  H04L12/56 ,  H04L12/54

CPC分类号： H04L49/901 ,  H04L12/2801 ,  H04L49/90 ,  H04L49/9057

摘要： An apparatus and method for managing reliable datagram work queues, and associated completion queues, using head and tail pointers with end-to-end context error cache are provided. Reliable datagram (RD) queue head and tail pointers are maintained in the channel interface and the host channel adapter. The head and tail pointers in the host channel adapter include a RD queue page table index and a RD queue page index for identifying a position within the RD queue. For RD work queues, in the channel interface, the tail pointer is used to identify a next position where a work queue entry may be written and the head pointer is used only to determine whether the work queue is full. In the host channel adapter, the head pointer is used to identify a next work queue entry for processing and the tail pointer is used to determine if the queue is empty.

摘要翻译： 提供了一种用于使用具有端到端上下文错误高速缓存的头和尾指针来管理可靠数据报工作队列和相关联的完成队列的装置和方法。 在通道接口和主机通道适配器中维护可靠的数据报（RD）队列头尾指针。 主机通道适配器中的头和尾指针包括RD队列页表索引和用于标识RD队列中的位置的RD队列页索引。 对于RD工作队列，在通道接口中，尾部指针用于标识可以写入工作队列条目的下一个位置，而头部指针仅用于确定工作队列是否已满。 在主机通道适配器中，头指针用于标识用于处理的下一个工作队列条目，并且尾部指针用于确定队列是否为空。

公开(公告)号：US06789143B2

公开(公告)日：2004-09-07

申请号：US09961922

申请日：2001-09-24

申请人： David F. Craddock ,  Thomas Anthony Gregg ,  Ian David Judd ,  Gregory Francis Pfister ,  Renato John Recio ,  Donald William Schmidt

发明人： David F. Craddock ,  Thomas Anthony Gregg ,  Ian David Judd ,  Gregory Francis Pfister ,  Renato John Recio ,  Donald William Schmidt

IPC分类号： G06F1300

CPC分类号： G06F9/546

摘要： A distributed computing system having (host and I/O) end nodes, switches, routers, and links interconnecting these components is provided. The end nodes use send and receive queue pairs to transmit and receive messages. The end nodes use completion queues to inform the end user when a message has been completely sent or received and whether an error occurred during the message transmission or reception process. A mechanism implements these queue pairs and completion queues in hardware. A mechanism for controlling the transfer of work requests from the consumer to the CA hardware and work completions from the CA hardware to the consumer using head and tail pointers that reference circular buffers is also provided. The QPs and CQs do not contain Work Queue Entries and Completion Queue Entries respectively, but instead contain references to these entries. This allows them to be efficient and constant in size, while the Work Queue Entries and Completion Queue Entries themselves can vary in size, for example to include a variable number of data segments. Additionally, several mechanisms are provided to improve the overall efficiency of this process under different memory configurations.

摘要翻译： 提供了具有（主机和I / O）端节点，交换机，路由器和互连这些组件的链路的分布式计算系统。 终端节点使用发送和接收队列对来发送和接收消息。 终端节点使用完成队列通知终端用户何时完全发送或接收了消息，以及在消息发送或接收过程中是否发生错误。 机制在硬件中实现这些队列对和完成队列。 还提供了一种机制，用于控制从消费者到CA硬件的工作请求的传送以及使用引用循环缓冲区的头和尾指针从CA硬件到消费者的完成。 QP和CQ不分别包含工作队列条目和完成队列条目，而是包含对这些条目的引用。 这允许它们在高度和大小上是恒定的，而工作队列条目和完成队列条目本身可以在大小上变化，例如包括可变数量的数据段。 另外，提供了几种机制以在不同的存储器配置下提高该过程的整体效率。

公开(公告)号：US06721335B1

公开(公告)日：2004-04-13

申请号：US09439012

申请日：1999-11-12

申请人： Thomas Anthony Gregg

发明人： Thomas Anthony Gregg

IPC分类号： H04L1256

CPC分类号： H04L12/40163 ,  H04L12/40032 ,  H04L12/407

摘要： Defines and handles segments in messages to place pauses and interruptions within the communication of a message between transmitted segments of the message. A common link switch is used in a network to connect links to all nodes, the segment structures in each message is preserved when packets of each message are passed within the switch to a switch transmitter connected to the destination node indicated in each packet of the message for transmitting each of the message segments. Each transmitter stores the source identifier of the first packet it transmits for a segment and then gives priority to transmitting packets which contain source and destination identifiers which match the current transmitter stored source identifier and match the destination node connected to the transmitter. This priority enables each switch transmitter to interleaves segments of concurrent messages while preserving the segmentation of transmitted packets to maintaining a maximum network communication rate for the messages. When an unexpected wait occurs within a transmitting segment, which exceeds a predetermined time-out period, a transmission of any other waiting segment is started, which improves the message transmission efficiency in the network.

摘要翻译： 定义和处理消息中的段，以在消息的传输段之间的消息通信中暂停和中断。 在网络中使用公共链路交换机将链路连接到所有节点，当每个消息的分组在交换机内传递到连接到消息的每个分组中指示的目的地节点的交换机发射机时，保留每个消息中的分段结构 用于发送每个消息段。 每个发射机存储其针对一个段发射的第一个分组的源标识符，然后优先发送包含与当前发射机存储的源标识符匹配的源和目的地标识符并且匹配连接到发射机的目的地节点的分组。 这个优先级使得每个交换机发送器能够交织并发消息的分段，同时保持所发送的分组的分段以维持消息的最大网络通信速率。 当在超过预定超时周期的发送段内发生意外等待时，任何其他等待段的发送开始，这提高了网络中的消息传输效率。