公开(公告)号：US20230337488A1

公开(公告)日：2023-10-19

申请号：US18212733

申请日：2023-06-22

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun PARK ,  Dong Woo KIM ,  Sung Jae MOON ,  Kang Moon JO

IPC: H10K59/131 ,  H10K59/35 ,  H10K59/123 ,  H10K59/121

CPC classification number: H10K59/131 ,  H01L28/60 ,  H10K59/35 ,  H10K59/123 ,  H10K59/1216

Abstract: The present disclosure relates to a display device, and the display device according to an exemplary embodiment of the present inventive concept includes: a first pixel circuit portion including at least one transistor; a second pixel circuit portion including at least one transistor; a first pixel electrode electrically connected to the first pixel circuit portion; a second pixel electrode electrically connected to the second pixel circuit portion; a first data line electrically connected to the first pixel circuit portion; and a second data line electrically connected to the second pixel circuit portion, wherein the first data line and the second data line are arranged adjacent to each other along a first direction, and the second pixel electrode overlaps the first data line and the second data line in a plan view.

公开(公告)号：US20210056908A1

公开(公告)日：2021-02-25

申请号：US16901079

申请日：2020-06-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun PARK ,  Dong Woo KIM ,  An Su LEE ,  Kang Moon JO

IPC: G09G3/3266 ,  G09G3/3275 ,  G09G3/3225

Abstract: A scan signal driver including: a plurality of stages for outputting scan signals and sensing signals, wherein a kth stage among the stages is connected to a kth scan signal line and a kth sensing signal line, and wherein the kth stage includes: a first output unit configured to output a scan clock signal input to a fit scan clock terminal to the kth scan signal line as a kth scan signal and to output a sensing clock signal input to a first sensing clock terminal to the kth sensing signal line as a k sensing signal when a pull-up node has a gate-on voltage; and a second output unit configured to output a carry clock signal input to a first carry clock terminal as a kth carry signal to a carry output terminal when the pull-up node has the gate-on voltage.

公开(公告)号：US20200343326A1

公开(公告)日：2020-10-29

申请号：US16815778

申请日：2020-03-11

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun PARK ,  Dong Woo KIM ,  Sung Jae MOON ,  Kang Moon JO

IPC: H01L27/32 ,  G09G3/3266 ,  H01L27/02

Abstract: A display device may include a substrate including a display area and a non-display area, pixels provided in the display area and each pixel including a pixel transistor and a light emitting element connected to the pixel transistor, a first driver provided in the non-display area and configured to provide a scan signal to the pixel, a scan line configured to transfer the scan signal to the pixel, a first fan-out line provided in the non-display area and connected to the scan line, and a first electrostatic discharge portion provided in the non-display area and located between the first fan-out line and the scan line. The first electrostatic discharge portion may include a bottom metal layer disposed on the substrate and a transistor disposed on and electrically connected to the bottom metal layer.

公开(公告)号：US20160219706A1

公开(公告)日：2016-07-28

申请号：US14842338

申请日：2015-09-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kang Moon JO ,  Se Hyoung CHO ,  Kyung-Hoon KIM ,  Dong Woo KIM ,  IL Gon KIM

IPC: H05K1/18 ,  H05K1/11 ,  H05K1/14

CPC classification number: H05K3/361 ,  H05K1/118 ,  H05K3/323 ,  H05K2201/09063 ,  H05K2201/09172 ,  H05K2201/09418 ,  H05K2201/10128

Abstract: A display device including a flexible substrate that includes a display part to display an image; a driving integrated chip (IC) that supplies a driving voltage to the display part; a flexible printed circuit (FPC) attached to an outer side portion of the substrate; and a printed circuit board (PCB) attached to the FPC, the PCB transferring the driving voltage to the driving IC through the FPC, wherein the FPC includes attachment parts at ends thereof, the attachment parts of the FPC being attached to pad parts at the outer side portion of the substrate and to pad parts of the PCB, and the attachment parts include slits therein.

Abstract translation: 一种显示装置，包括：柔性基板，包括显示图像的显示部; 驱动集成芯片（IC），其向所述显示部件提供驱动电压; 柔性印刷电路（FPC），其附接到所述基板的外侧部分; 以及安装在FPC上的印刷电路板（PCB），PCB通过FPC将驱动电压传递给驱动IC，其中FPC包括在其端部处的安装部分，FPC的安装部分附接到焊盘部件 基板的外侧部分和PCB的焊盘部分，并且附接部分包括狭缝。

公开(公告)号：US20160216800A1

公开(公告)日：2016-07-28

申请号：US14818677

申请日：2015-08-05

Applicant: Samsung Display Co., Ltd.

Inventor： Se Hyoung CHO ,  Kyung-Hoon KIM ,  Kang Moon JO ,  Dong Woo KIM ,  Il Gon KIM

IPC: G06F3/044 ,  G06F3/041

CPC classification number: G06F3/044 ,  G02F1/13338 ,  G02F1/133603 ,  G06F3/0412 ,  G06F3/0416 ,  G06F2203/04111 ,  G09G3/3208 ,  G09G3/3233 ,  G09G3/3258 ,  G09G3/3291 ,  G09G2300/0426 ,  G09G2300/0852 ,  G09G2320/0295 ,  H01L25/167 ,  H01L27/3225 ,  H01L27/323

Abstract: In a display device, a driving element is disposed on a rear substrate, and a passivation layer covers the driving element. A pixel electrode is disposed on the passivation layer and is connected to the driving element. An organic emission layer is disposed on the pixel electrode and is configured to emit tight toward the rear substrate. A common electrode is disposed on the organic emission layer. A touch electrode is disposed between the rear substrate and the passivation layer, and it forms a capacitive component when an external touch occurs.

Abstract translation: 在显示装置中，驱动元件设置在后基板上，钝化层覆盖驱动元件。 像素电极设置在钝化层上并连接到驱动元件。 有机发光层设置在像素电极上并且被配置为朝向后基板发光。 公共电极设置在有机发射层上。 触摸电极设置在后基板和钝化层之间，并且当外部触摸发生时，形成电容部件。

公开(公告)号：US20150144939A1

公开(公告)日：2015-05-28

申请号：US14291535

申请日：2014-05-30

Applicant: Samsung Display Co., Ltd.

Inventor： Young Joo CHOI ,  Joon Geol KIM ,  Seung-Ho JUNG ,  Kang Moon JO

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618

Abstract: A thin film transistor array panel includes: a gate line including a gate electrode; a first gate insulating layer on the gate line; a semiconductor layer on the first gate insulating layer and overlapping the gate electrode; a second gate insulating layer on the semiconductor layer and the first gate insulating layer, and an opening in the second gate insulating layer and through which the semiconductor layer is exposed; drain and source electrodes on the second gate insulating and semiconductor layers and facing each other; a first field generating electrode; and a second field generating electrode connected to the drain electrode. The semiconductor layer includes an oxide semiconductor layer, and first and second auxiliary layers on the oxide semiconductor layer and separated from each other. An edge of the drain and source electrodes is disposed inside an edge of the first and second auxiliary layers, respectively.

Abstract translation: 薄膜晶体管阵列面板包括：栅极线，包括栅电极; 栅极线上的第一栅极绝缘层; 在所述第一栅极绝缘层上的半导体层，并且与所述栅电极重叠; 在所述半导体层和所述第一栅极绝缘层上的第二栅极绝缘层和所述第二栅极绝缘层中的所述半导体层暴露的开口; 第二栅绝缘层和半导体层上的漏极和源极彼此面对; 第一场产生电极; 以及连接到漏电极的第二场产生电极。 半导体层包括氧化物半导体层，以及氧化物半导体层上的第一和第二辅助层，并且彼此分离。 漏极和源电极的边缘分别设置在第一和第二辅助层的边缘的内侧。

公开(公告)号：US20240423041A1

公开(公告)日：2024-12-19

申请号：US18632178

申请日：2024-04-10

Applicant: Samsung Display Co., LTD.

Inventor： Kang Moon JO ,  Sun Kwang KIM ,  Yoo Mi RA ,  Dong Yoon LEE ,  Seong Young LEE

IPC: H10K59/131 ,  H10K59/80 ,  H10K102/00 ,  H10K102/10

Abstract: A display device includes a substrate; a pixel electrode disposed in a display area of the substrate and a transistor connected to the pixel electrode; a gate driver disposed in a non-display area of the substrate and connected to a gate electrode of the transistor; and a common voltage line disposed in the non-display area of the substrate to overlap the gate driver in a plan view, where the common voltage line defines at least one exhaust hole penetrating the common voltage line therein.

公开(公告)号：US20220293712A1

公开(公告)日：2022-09-15

申请号：US17635292

申请日：2019-11-26

Applicant: Samsung Display Co., LTD.

Inventor： Jun Hyun PARK ,  Dong Woo KIM ,  Sung Jae MOON ,  Kang Moon JO

IPC: H01L27/32

Abstract: A display device has a display area and a non-display area extending around the display area and includes: a plurality of pixels in the display area, a first voltage line in the display area; and a second voltage line in the non-display area. Each of the pixels includes an electrode pattern connected to the first voltage line, a pixel-defining film on the electrode pattern, an emission layer on the pixel-defining film, and a common electrode on the emission layer. The pixels include first-type pixels in which the common electrode and the electrode pattern are connected through an opening hole formed in the pixel-defining film and exposing part of the electrode pattern and second-type pixels in which the opening hole is not formed and the common electrode and the electrode pattern are not connected. The first-type pixels and the second-type pixels are adjacent to each other.

公开(公告)号：US20220085137A1

公开(公告)日：2022-03-17

申请号：US17532732

申请日：2021-11-22

Applicant: Samsung Display Co., LTD.

Inventor： Jun Hyun PARK ,  Kang Moon JO ,  Dong Woo KIM

IPC: H01L27/32

Abstract: A display device includes: a substrate; a first conductive layer including a lower pattern disposed on the substrate; an active layer including a first active pattern disposed on the first conductive layer; and a second conductive layer including a first gate electrode disposed on the active layer, wherein the first gate electrode overlaps a first channel region included in the first active pattern, the lower pattern overlaps the first active pattern, and the first active pattern does not cross an edge of the lower pattern.

公开(公告)号：US20210327868A1

公开(公告)日：2021-10-21

申请号：US17215682

申请日：2021-03-29

Applicant: Samsung Display Co., LTD.

Inventor： Kang Moon JO ,  An Su LEE ,  June Whan CHOI

IPC: H01L27/02

Abstract: A display device includes a substrate including a display area and a non-display area; a semiconductor layer including a source area, a channel area, and a drain area and disposed in the non-display area of the substrate; a gate electrode overlapping the channel area of the semiconductor layer; a gate insulating layer disposed between the gate electrode and the channel area of the semiconductor layer; a source electrode electrically connected to the source area of the semiconductor layer; and a drain electrode electrically connected to the drain area of the semiconductor layer, wherein a lateral side of the gate electrode overlaps the drain electrode.