公开(公告)号：US10749672B2

公开(公告)日：2020-08-18

申请号：US15585253

申请日：2017-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heonsoo Lee ,  Jaechul Park ,  Jonghoon Shin ,  Youngjin Chung ,  Hong-Mook Choi

IPC: H04L9/08 ,  G06F12/06 ,  G06F13/40 ,  G06F21/78 ,  G06F12/14

Abstract: A path for transmitting encrypted data is completely separated from a path for transmitting unencrypted data. To this end, a virtual secure memory is created on an address space. If a central processing unit (CPU) writes data in the virtual secure memory, hardware stores the data in a specific area of a dynamic random access memory (DRAM) after automatically encrypting the data. In the case where the CPU intents to read data, the hardware sends the data to the CPU after automatically decrypting the data read from a specific area of the DRAM.

公开(公告)号：US20170346628A1

公开(公告)日：2017-11-30

申请号：US15585253

申请日：2017-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heonsoo Lee ,  Jaechul Park ,  Jonghoon Shin ,  Yougjin Chung ,  Hong-Mook Choi

IPC: H04L9/08 ,  G06F12/14

CPC classification number: H04L9/0861 ,  G06F12/063 ,  G06F12/1408 ,  G06F13/40 ,  G06F13/404 ,  G06F21/78 ,  G06F2212/1052 ,  H04L9/0838

Abstract: A path for transmitting encrypted data is completely separated from a path for transmitting unencrypted data. To this end, a virtual secure memory is created on an address space. If a central processing unit (CPU) writes data in the virtual secure memory, hardware stores the data in a specific area of a dynamic random access memory (DRAM) after automatically encrypting the data. In the case where the CPU intents to read data, the hardware sends the data to the CPU after automatically decrypting the data read from a specific area of the DRAM.

公开(公告)号：US20220231832A1

公开(公告)日：2022-07-21

申请号：US17467546

申请日：2021-09-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyosun Hwang ,  Gisoo Seo ,  Jonghoon Shin ,  Hyojoon Jin ,  Ingoo Heo ,  Jinsu Hyun

IPC: H04L9/00 ,  G06F7/58 ,  G06F21/72 ,  G06F21/78 ,  H04L9/08 ,  G06F17/11

Abstract: A device includes a random number generator configured to generate a random number, a memory configured to store at least one lookup table, and a processing circuit configured to generate a generator based on the random number, create the at least one lookup table based on the generator, and write the created at least one lookup table to the memory, wherein the processing circuit is configured to access the memory based on a first input and a second input, and generate a result of a modular multiplication of the first input by the second input based on the at least one lookup table.

公开(公告)号：US09633185B2

公开(公告)日：2017-04-25

申请号：US14556397

申请日：2014-12-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jonghoon Shin ,  KyoungMoon Ahn ,  Mijung Noh ,  Yong Ki Lee ,  Sun-Soo Shin

IPC: G06F21/00 ,  G06F21/31 ,  G06F21/60 ,  G01R31/3185

CPC classification number: G06F21/31 ,  G01R31/318588 ,  G06F21/602

Abstract: A method of debugging a device which includes a plurality of processors is provided. The method includes verifying a request to initiate authentication that is provided to the device to a user; performing a challenge-response authentication operation between the user and the device in response to the request to initiate authentication being a request from a non-malicious user; activating or deactivating an access to a Joint Test Action Group (JTAG) port of each of the processors, based on access control information from the user; and permitting a debugging operation via an access that is activated.

公开(公告)号：US20160034255A1

公开(公告)日：2016-02-04

申请号：US14722761

申请日：2015-05-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun-Soo Shin ,  Jonghoon Shin ,  KyoungMoon Ahn ,  Yong Ki Lee

IPC: G06F7/523

CPC classification number: G06F7/728

Abstract: Disclosed are arithmetic devices, a method of a Montgomery parameter calculation thereof and a Montgomery multiplication method thereof. The method of the Montgomery parameter calculation of the arithmetic devices includes detecting a position of a most significant bit (MSB) of a modulus, calculating an initial value using position information about the detected MSB, and calculating an intermediate value and a Montgomery parameter by repeatedly performing a Montgomery addition or a Montgomery multiplication with respect to the initial value.

Abstract translation: 公开了算术装置，其计算Montgomery参数的方法和Montgomery乘法方法。 算术装置的蒙哥马利参数计算方法包括检测模数的最高有效位（MSB）的位置，使用关于检测到的MSB的位置信息计算初始值，并通过重复地计算中间值和蒙哥马利参数 执行Montgomery加法或Montgomery乘法相对于初始值。

公开(公告)号：US20130311531A1

公开(公告)日：2013-11-21

申请号：US13734520

申请日：2013-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYOUNGMOON AHN ,  Jonghoon Shin ,  Yong Ki Lee ,  Ji-su Kang ,  Sun-soo Shin

IPC: G06F7/72

CPC classification number: G06F7/72 ,  G06F7/728

Abstract: A modular arithmetic unit includes a first input generator receiving first data to generate a first operand; a second input generator receiving second data to generate a second operand; an accumulator performing an accumulate/shift operation to add the first and second operands and outputting the carry and sum; a carry propagation adder adding the carry and the sum to output a result; and a data handler receiving either external data or the result and outputting the first data and the second data.

Abstract translation: 模块运算单元包括接收第一数据以产生第一操作数的第一输入发生器; 接收第二数据以产生第二操作数的第二输入发生器; 累加器执行累加/移位操作以添加第一和第二操作数并输出进位和和; 一个进位传播加法器，加上进位和和输出一个结果; 以及接收外部数据或结果并输出第一数据和第二数据的数据处理器。