公开(公告)号：US20240135859A1

公开(公告)日：2024-04-25

申请号：US18466892

申请日：2023-09-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ying-Da Chang ,  Chulho Choi ,  Yu-Chieh Huang ,  Ching-Chieh Wu ,  Hajoon Shin ,  Zhen-Guo Ding ,  Jia-Way Chen ,  Kyunlyeol Lee ,  Yongjoo Song

IPC: G09G3/20

CPC classification number: G09G3/2096 ,  G09G2310/0267 ,  G09G2310/0291 ,  G09G2320/0626 ,  G09G2320/0673

Abstract: A gamma tap circuit includes: (i) a first gamma division circuit configured to generate a first gamma tap voltage by performing voltage division of an upper gamma tap voltage and a lower gamma tap voltage, in-sync with a first clock signal CK1 and a first complementary clock signal CK1b, which is 180° out-of-phase relative to CK1, (ii) a second gamma division circuit configured to generate a second gamma tap voltage by performing voltage division of the upper gamma tap voltage and the first gamma tap voltage, in-sync with a second clock signal CK2 and a second complementary clock signal CK2b, which is 180° out-of-phase relative to CK2, and (iii) a third gamma division circuit configured to generate a third gamma tap voltage by performing voltage division of the first gamma tap voltage and the lower gamma tap voltage, in response to CK2 and CK2b, which have a lower frequency relative to CK1 and CK1b.

公开(公告)号：US11557241B2

公开(公告)日：2023-01-17

申请号：US17717590

申请日：2022-04-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chulho Choi ,  Yongjoo Song

IPC: G09G3/20

Abstract: A display device includes a display panel including data lines configured to receive an image signal, gate lines configured to receive a scan signal, and gate connection lines configured to transmit the scan signal to the gate lines; and a multi-chip film package including, on a film, a first gate integrated circuit (IC) configured to transmit a first scan signal to the gate connection lines through first gate output lines, a second gate IC configured to transmit a second scan signal to the gate connection lines through second gate output lines, and a source IC configured to transmit the image signal to the data lines through source output lines. Each of the first gate output lines is between two adjacent source output lines, and each of the second gate output lines is between two adjacent source output lines.