公开(公告)号：US20230266441A1

公开(公告)日：2023-08-24

申请号：US18112087

申请日：2023-02-21

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Romain COFFY ,  Younes BOUTALEB

IPC: G01S7/481 ,  H01L25/16

CPC classification number: G01S7/4813 ,  H01L25/167 ,  H01L25/165

Abstract: A time-of-flight sensor includes a first light ray generation circuit and a second light ray reception circuit. A resin layer encapsulates the first light ray generation circuit and the second light ray reception circuit. A first region configured to emit light rays of the first light ray generation circuit is exposed at a surface of the resin layer. A second region configured to receive light rays of the second light ray reception circuit is also exposed at that surface of the resin layer. The surface of the resin layer is configured to be directed towards a scene.

公开(公告)号：US20230069969A1

公开(公告)日：2023-03-09

申请号：US17903280

申请日：2022-09-06

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Younes BOUTALEB ,  Laurent SCHWARTZ

IPC: H01L23/367 ,  H01L23/00 ,  H01L25/065 ,  H01L23/373

Abstract: A package for integrated circuits includes a base substrate having a mounting face. A first electronic chip has a top face electrically connected to the mounting face and a bottom face mounted to the mounting face by an adhesive layer. A second electronic chip has a bottom face covered with a thermal interface layer and a top face electrically connected to the mounting face. A heat sink includes a first part embedded in the adhesive layer, a second part having a bottom face in contact with the layer of thermal interface material and a top face, and a connection part between the first part and the second part. A coating encapsulates the first and second electronic chips and the heat sink. The top face of the second part of the heat sink exposed from the encapsulating coating.

公开(公告)号：US20230060870A1

公开(公告)日：2023-03-02

申请号：US17884980

申请日：2022-08-10

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Younes BOUTALEB ,  Julien CUZZOCREA

IPC: H01L23/367 ,  H01L23/31

Abstract: An integrated circuit package includes a base substrate with at least one electronic chip mounted on a face of the base substrate. The electronic chip is configured to have hot spots in operation emitting heat in a heat volume space. A coating encapsulates the at least one electronic chip. The coating has a bottom face mounted on the face of the base substrate and a profiled top face. A portion of the profile top face is configured to locally reduce a volume of a region of the coating. The portion is located at least in part in the heat volume space. A heat sink is mounted on the profiled top face of the coating using a mounting layer.

公开(公告)号：US20220157683A1

公开(公告)日：2022-05-19

申请号：US17523386

申请日：2021-11-10

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Younes BOUTALEB ,  Fabien QUERCIA ,  Asma HAJJI ,  Ouafa HAJJI

IPC: H01L23/31

Abstract: A support substrate supports an electronic chip. An encapsulation coating on the support substrate coats the electronic chip. The encapsulation coating includes a trench surrounding the electronic chip. A heat sink is mounted to the encapsulation coating above the electronic chip. The heat sink is fixed to the encapsulation coating by an adhesive material and a thermal interface material layer is present between the electronic chip and the heat sink. The trench is positioned between the thermal interface material layer and the adhesive material.