公开(公告)号：US10892212B2

公开(公告)日：2021-01-12

申请号：US15808680

申请日：2017-11-09

Applicant: STMICROELECTRONICS, INC.

Inventor： Rennier Rodriguez ,  Aiza Marie Agudon ,  Maiden Grace Maming

IPC: H01L23/495 ,  H01L23/64 ,  H01L49/02

Abstract: The present disclosure is directed to a flat no-lead semiconductor package with a surfaced mounted structure. An end portion of the surface mounted structure includes a recessed member so that the surface mounted structure is coupled to leads of the flat no-lead semiconductor package through, among others, the sidewalls of the recessed members.

公开(公告)号：US10535588B2

公开(公告)日：2020-01-14

申请号：US15408979

申请日：2017-01-18

Applicant: STMicroelectronics, Inc.

Inventor： Rennier Rodriguez ,  Aiza Marie Agudon ,  Jefferson Talledo

IPC: H01L23/495 ,  H01L21/683 ,  H01L21/304 ,  H01L21/3065 ,  H01L23/00 ,  H01L23/58 ,  H01L21/78 ,  H01L29/06 ,  H01L33/20 ,  H01L21/302 ,  H01L21/306

Abstract: The present disclosure is directed to a die having a metallized sidewall and methods of manufacturing the same. A contiguous metal layer is applied to each edge of a backside of a wafer. The wafer is cut at a base of a plurality of channels formed in the backside to create individual die each having a flange that is part of a sidewall of the die and includes a portion that is covered by the metal layer. When an individual die is coupled to a die pad, a semiconductive glue bonds the metal layer on the sidewall and a backside of the die to the die pad, which decreases the risk of delamination along the sides of the die. The flange also prevents the glue from contacting the active side of the die by acting as a barrier against adhesive creep of the glue up the sidewall of the die.