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公开(公告)号：US11552007B2
公开(公告)日：2023-01-10
申请号：US17185742
申请日：2021-02-25
Applicant: STMicroelectronics, Inc.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Jefferson Talledo , Moonlord Manalo , Ela Mia Cadag , Rammil Seguido
IPC: H01L23/495 , H01L23/31 , H01L21/48 , H01L21/56
Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
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公开(公告)号：US20180190576A1
公开(公告)日：2018-07-05
申请号：US15399234
申请日：2017-01-05
Applicant: STMicroelectronics, Inc.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Jefferson Talledo , Moonlord Manalo , Ela Mia Cadag , Rammil Seguido
IPC: H01L23/495 , H01L23/31 , H01L21/48 , H01L21/56
CPC classification number: H01L23/49503 , H01L23/3107 , H01L23/3142 , H01L23/49513 , H01L23/49548 , H01L2224/27013 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83192 , H01L2224/83385 , H01L2224/92247 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
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公开(公告)号：US10109563B2
公开(公告)日：2018-10-23
申请号：US15399234
申请日：2017-01-05
Applicant: STMicroelectronics, Inc.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Jefferson Talledo , Moonlord Manalo , Ela Mia Cadag , Rammil Seguido
IPC: H01L23/495 , H01L23/31 , H01L21/48 , H01L21/56
Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
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公开(公告)号：US20170084490A1
公开(公告)日：2017-03-23
申请号：US14857965
申请日：2015-09-18
Applicant: STMICROELECTRONICS, INC.
Inventor： Bryan Christian Bacquian , Frederick Arellano , Aiza Marie Agudon
CPC classification number: H01L21/02021 , H01L21/02035 , H01L21/56 , H01L21/6836 , H01L21/78 , H01L22/12 , H01L23/293 , H01L23/3142 , H01L24/48 , H01L24/49 , H01L29/06 , H01L2221/68327 , H01L2221/6834 , H01L2224/48225 , H01L2924/00014 , H01L2924/10157 , H01L2924/10158 , H01L2924/14 , H01L2224/45099
Abstract: A method is for making an integrated circuit (IC) device. The method may include dicing a wafer into IC dies, each IC die having an active surface, a back surface opposite the active surface, and a sidewall with a step defining a smaller periphery adjacent the back surface and a larger periphery adjacent the active surface. The method may include positioning a resin material between the back surface of each IC die and a respective substrate, and around each IC die so that the resin material abuts and is retained by the step.
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公开(公告)号：US12074100B2
公开(公告)日：2024-08-27
申请号：US17131222
申请日：2020-12-22
Applicant: STMICROELECTRONICS, INC.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Maiden Grace Maming
IPC: H01L23/495 , H01L23/64 , H01L49/02
CPC classification number: H01L23/49589 , H01L23/49548 , H01L23/647 , H01L23/49575 , H01L28/10 , H01L28/20 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H01L2924/181 , H01L2924/00012
Abstract: The present disclosure is directed to a flat no-lead semiconductor package with a surfaced mounted structure. An end portion of the surface mounted structure includes a recessed member so that the surface mounted structure is coupled to leads of the flat no-lead semiconductor package through, among others, the sidewalls of the recessed members.
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Patent Agency Ranking
公开(公告)号：US10957634B2
公开(公告)日：2021-03-23
申请号：US16800923
申请日：2020-02-25
Applicant: STMicroelectronics, Inc.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Jefferson Talledo , Moonlord Manalo , Ela Mia Cadag , Rammil Seguido
IPC: H01L23/495 , H01L23/31 , H01L21/48 , H01L21/56
Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
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公开(公告)号：US20190139875A1
公开(公告)日：2019-05-09
申请号：US15808680
申请日：2017-11-09
Applicant: STMICROELECTRONICS, INC.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Maiden Grace Maming
IPC: H01L23/495
Abstract: The present disclosure is directed to a flat no-lead semiconductor package with a surfaced mounted structure. An end portion of the surface mounted structure includes a recessed member so that the surface mounted structure is coupled to leads of the flat no-lead semiconductor package through, among others, the sidewalls of the recessed members.
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公开(公告)号：US20190043790A1
公开(公告)日：2019-02-07
申请号：US16154538
申请日：2018-10-08
Applicant: STMicroelectronics, Inc.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Jefferson Talledo , Moonlord Manalo , Ela Mia Cadag , Rammil Seguido
IPC: H01L23/495 , H01L21/48 , H01L21/56 , H01L23/31
Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.
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公开(公告)号：US09761538B1
公开(公告)日：2017-09-12
申请号：US15068752
申请日：2016-03-14
Applicant: STMICROELECTRONICS, INC
Inventor： Rennier Rodriguez , Frederick Arellano , Aiza Marie Agudon
CPC classification number: H01L23/552 , H01L21/4814 , H01L21/561 , H01L21/78 , H01L23/29 , H01L23/3121 , H01L23/3135 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/16227 , H01L2224/2919 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L2924/3025 , H01L2924/00012 , H01L2224/83 , H01L2224/85 , H01L2224/81
Abstract: A method for making shielded integrated circuit (IC) packages includes providing spaced apart IC dies carried by a substrate and covered by a common encapsulating material, and cutting through the common encapsulating material between adjacent IC dies to define spaced apart IC packages carried by the substrate. An electrically conductive layer is positioned over the spaced apart IC packages and fills spaces between adjacent IC packages. The method further includes cutting through the electrically conductive layer between adjacent IC packages and through the substrate to form the shielded IC packages.
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公开(公告)号：US12159820B2
公开(公告)日：2024-12-03
申请号：US17139669
申请日：2020-12-31
Applicant: STMICROELECTRONICS, INC.
Inventor： Rennier Rodriguez , Aiza Marie Agudon , Maiden Grace Maming
IPC: H01L23/495 , H01L23/64 , H01L49/02
Abstract: The present disclosure is directed to a flat no-lead semiconductor package with a surfaced mounted structure. An end portion of the surface mounted structure includes a recessed member so that the surface mounted structure is coupled to leads of the flat no-lead semiconductor package through, among others, the sidewalls of the recessed members.
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