公开(公告)号：US20130270649A1

公开(公告)日：2013-10-17

申请号：US13859341

申请日：2013-04-09

Applicant: STMICROELECTRONICS SA

Inventor： Alain Chantre ,  Pascal Chevalier ,  Gregory Avenier

IPC: H01L29/73 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/66272 ,  H01L21/8249 ,  H01L27/1203 ,  H01L29/1004 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66265 ,  H01L29/73 ,  H01L29/7317 ,  H01L29/7322 ,  H01L29/7371

Abstract: A method for manufacturing a bipolar transistor, including the steps of: forming a first surface-doped region of a semiconductor substrate having a semiconductor layer extending thereon with an interposed first insulating layer; forming, at the surface of the device, a stack of a silicon layer and of a second insulating layer; defining a trench crossing the stack and the semiconductor layer opposite to the first doped region, and then an opening in the exposed region of the first insulating layer; forming a single-crystal silicon region in the opening; forming a silicon-germanium region at the surface of single-crystal silicon region, in contact with the remaining regions of the semiconductor layer and of the silicon layer; and forming a second doped region at least in the remaining space of the trench.

Abstract translation: 一种制造双极晶体管的方法，包括以下步骤：形成半导体衬底的第一表面掺杂区，其半导体层在其上延伸有第一绝缘层; 在所述器件的表面处形成硅层和第二绝缘层的堆叠; 限定与所述堆叠交叉的沟槽和与所述第一掺杂区域相对的所述半导体层，以及所述第一绝缘层的所述暴露区域中的开口; 在开口中形成单晶硅区域; 在与所述半导体层和所述硅层的剩余区域接触的单晶硅区域的表面上形成硅 - 锗区域; 以及至少在所述沟槽的剩余空间中形成第二掺杂区域。

公开(公告)号：US09640631B2

公开(公告)日：2017-05-02

申请号：US14970341

申请日：2015-12-15

Applicant: STMicroelectronics SA

Inventor： Alain Chantre ,  Pascal Chevalier ,  Gregory Avenier

IPC: H01L29/66 ,  H01L21/8249 ,  H01L27/12 ,  H01L29/73 ,  H01L29/732 ,  H01L29/737 ,  H01L29/10

CPC classification number: H01L29/66272 ,  H01L21/8249 ,  H01L27/1203 ,  H01L29/1004 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/66265 ,  H01L29/73 ,  H01L29/7317 ,  H01L29/7322 ,  H01L29/7371

Abstract: A method for manufacturing a bipolar transistor, including the steps of: forming a first surface-doped region of a semiconductor substrate having a semiconductor layer extending thereon with an interposed first insulating layer; forming, at the surface of the device, a stack of a silicon layer and of a second insulating layer; defining a trench crossing the stack and the semiconductor layer opposite to the first doped region, and then an opening in the exposed region of the first insulating layer; forming a single-crystal silicon region in the opening; forming a silicon-germanium region at the surface of single-crystal silicon region, in contact with the remaining regions of the semiconductor layer and of the silicon layer; and forming a second doped region at least in the remaining space of the trench.