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公开(公告)号:US11758799B2
公开(公告)日:2023-09-12
申请号:US17489631
申请日:2021-09-29
Applicant: Samsung Display Co., Ltd.
Inventor: Min Hee Choi , Chung Yi , Yun Kyeong In
IPC: H01L51/56 , H10K77/10 , H10K50/842 , H10K59/122 , H10K59/131 , H10K59/121 , H10K71/00 , H01L27/12 , H10K59/12 , H10K102/00
CPC classification number: H10K77/111 , H10K50/8428 , H10K59/122 , H10K59/1213 , H10K59/1216 , H10K59/131 , H10K71/00 , H01L27/124 , H01L27/1218 , H01L27/1255 , H01L27/1262 , H10K59/1201 , H10K2102/311
Abstract: A display device may include a substrate, pixels, and a crack mitigation structure. The substrate may include a main region, a sub-region, and a bending region. The bending region may be connected between the main region and the sub-region and may include a curved outline section. The pixels may be disposed on the main region. The crack mitigation structure may be disposed on the bending region. A section of the crack mitigation structure may be substantially parallel to the curved outline section.
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公开(公告)号:US11605699B2
公开(公告)日:2023-03-14
申请号:US17161876
申请日:2021-01-29
Applicant: Samsung Display Co., LTD.
Inventor: Il Goo Youn , Ji Eun Lee , Jun Young Jo , Min Hee Choi
IPC: H01L51/00 , H01L27/12 , H01L27/32 , H01L29/786 , G09G3/3266 , G09G3/3225
Abstract: A display device includes: a substrate; a display area including pixels arranged on the substrate; a first area disposed at one side of the display area; a second area including pads arranged on the substrate; a bending area disposed between the first area and the second area; and a fan-out line disposed in the first area, the bending area, and the second area. The fan-out line includes: a plurality of sub-routing lines arranged in the first area and electrically connected to each other; and a plurality of sub-pad lines arranged in the second area and electrically connected to each other. The number of the plurality of sub-routing lines is greater than the number of the plurality of sub-pad lines.
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公开(公告)号:US11508936B2
公开(公告)日:2022-11-22
申请号:US16924176
申请日:2020-07-08
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Chul Kyu Kang , Dae Suk Kim , Seon Kyoon Mok , Il Goo Youn , Dong Sun Lee , So Young Lee , Ji Eun Lee , Jun Young Jo , Min Hee Choi
IPC: H01L27/14 , H01L27/32 , H01L33/44 , H01L51/00 , H01L51/52 , G02F1/133 , G06F1/16 , G09F9/30 , H01L27/146 , G02F1/1335 , G02F1/1333
Abstract: A display device includes a substrate on which an active region and a non-active region disposed are defined. The non-active region at least partially surrounds the active region. A light-emitting element is disposed in the active region on the substrate. An encapsulation layer is disposed on the light-emitting element. Block patterns are disposed in the non-active region on the substrate and at least partially surround the active region. The non-active region includes a first non-active region positioned at a first side of the active region and a second non-active region positioned at a second side of the active region. There are more block patterns disposed in the first non-active region than in the second non-active region.
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公开(公告)号:US11444147B2
公开(公告)日:2022-09-13
申请号:US17245576
申请日:2021-04-30
Applicant: Samsung Display Co., LTD.
Inventor: Min Hee Choi , Ji-Eun Lee , Jin Tae Jeong , Yun Sik Joo
IPC: H01L27/32 , G09G3/3258 , G09G3/3233 , G09G3/36
Abstract: A display device includes a light emitting diode electrically connected between a driving voltage line and a common voltage line; a driving transistor electrically connected between the driving voltage line and the light emitting diode; a second transistor electrically connected between a first electrode of the driving transistor electrically connected to the driving voltage line and a data line; a first scan line electrically connected to a gate electrode of the second transistor; a third transistor electrically connected between a second electrode of the driving transistor electrically connected to the light emitting diode and a gate electrode of the driving transistor; and a connection electrode that connects the gate electrode of the driving transistor and the third transistor, wherein at least a part of a contact portion where the connection electrode contacts the third transistor does not overlap the first scan line.
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