公开(公告)号：US10120752B2

公开(公告)日：2018-11-06

申请号：US15675817

申请日：2017-08-14

Applicant: Silicon Motion, Inc.

Inventor： Li-Shuo Hsiao ,  Chang-Kai Cheng

IPC: G11C29/00 ,  G06F11/10 ,  G06F3/06 ,  G06F12/00

Abstract: The present invention provides a data-storage device including a flash memory and a controller. The flash memory includes a plurality of blocks, and each of the blocks has a plurality of pages, wherein each of the pages has a plurality of sub-pages and a plurality of spare areas, each of the spare areas is arranged to store a spare data sector, and the spare data sector respectively corresponds to the sub-pages. The controller is arranged to access the sub-pages according to the spare data sector.

公开(公告)号：US10007601B2

公开(公告)日：2018-06-26

申请号：US13862782

申请日：2013-04-15

Applicant: Silicon Motion, Inc.

Inventor： Chang-Kai Cheng

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7202

Abstract: A data storage device and operating method for a FLASH memory are disclosed. The data storage device includes a FLASH memory and a controller. The FLASH memory includes a first block and a second block. The first and second blocks each includes a plurality of pages. The controller executes a firmware to determine whether a data segment from a host is a complete page segment. When the data segment is a complete page segment, the controller stores the data segment into the first block. When the data segment is an incomplete page segment, the controller stores the data into segment the second block.

公开(公告)号：US09766974B2

公开(公告)日：2017-09-19

申请号：US14547412

申请日：2014-11-19

Applicant: Silicon Motion, Inc.

Inventor： Li-Shuo Hsiao ,  Chang-Kai Cheng

IPC: G11C29/00 ,  G06F11/10 ,  G06F3/06 ,  G06F12/00

CPC classification number: G06F11/1068 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/1016 ,  G06F12/00 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/1044 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7207

Abstract: The present invention provides a data-storage device including a flash memory and a controller. The flash memory includes a plurality of blocks, and each of the blocks has a plurality of pages, wherein each of the pages has a plurality of sub-pages and a plurality of spare areas, each of the spare areas is arranged to store a spare data sector, and the spare data sector respectively corresponds to the sub-pages. The controller is arranged to access the sub-pages according to the spare data sector.

公开(公告)号：US09690695B2

公开(公告)日：2017-06-27

申请号：US14013274

申请日：2013-08-29

Applicant: Silicon Motion, Inc.

Inventor： Chang-Kai Cheng

IPC: G06F12/02

CPC classification number: G06F12/0246

Abstract: A mapping table H2F update technique for a FLASH memory is disclosed. In a disclosed data storage device, the controller updates a logical-to-physical address mapping table between a host and the FLASH memory in accordance with a group count of a buffer block of the FLASH memory. The group count reflects a logical address distribution of write data buffered in the buffer block and with non-updated logical-to-physical address mapping information. The higher the group count, the more dispersed the logical address distribution. In this manner, each update of the logical-to-physical address mapping table just takes a short time.