Abstract:
Systems and methods for enabling pre-compensation of timing offsets in OFDM receivers without invalidating channel estimates are described. Timing offset estimations may be sent along with the received OFDM symbols for FFT computation and generating a de-rotated signal output. The timing offset estimation may provide a reference point for dynamic tracking of timing for an OFDM signal and estimated based on an integral value associated with the OFDM signal.
Abstract:
Systems and methods for maintaining synchronization of repeater networks with Global Positioning System (GPS) signals using phase locked loops (PLLs) and based on generation of predicted control words for controlling local oscillator frequencies is described. The predicted control words can be generated based on performing a linear fit of control words generated over a predetermined duration of time. Phase locked loops with additional false GPS pulse identification and GPS signal loss compensation circuitry can enforce a false pulse count threshold and/or an error threshold. The additional circuitry and prediction of control words can overcome errors in GPS receiver outputs and maintain accuracy of signal timings across single frequency networks using inexpensive local oscillators.
Abstract:
Systems, algorithms and methods for reclaiming unused portions of a satellite broadcast service's bandwidth for new services, utilizing higher performance coding techniques to yield better throughput, are presented. Reclamation of bandwidth can be achieved in a way that is invisible to a legacy receiver, and that does not interfere with its reception of a legacy signal. New data may be transmitted within a legacy transmission frame, for example within its cluster structure, using the same modulation and synchronization as used for the legacy data. In other embodiments, one or more clusters or subdivisions with only new data may be transmitted, using the same or different modulation and synchronization as the legacy data clusters, but now employing a higher performing FEC and data interleaving structure on those clusters which contain only new data to yield an increase in available throughput.
Abstract:
Systems and methods for enabling pre-compensation of timing offsets in OFDM receivers without invalidating channel estimates are described. Timing offset estimations may be sent along with the received OFDM symbols for FFT computation and generating a de-rotated signal output. The timing offset estimation may provide a reference point for dynamic tracking of timing for an OFDM signal and estimated based on an integral value associated with the OFDM signal.
Abstract:
Systems and methods for a non-data-aided (NDA) approach to advanced OFDM timing are provided. This approach allows for accurate OFDM symbol timing and synchronization by avoiding inter-symbol interference (ISI) in multipath environments where an earliest arriving signal may not be the strongest signal. The NDA approach may rely on generating and applying a bias correction to a combined correlation result of the multi-path signals.
Abstract:
Systems and methods for performing automatic frequency control are provided. Instead of relying on individual frequency tuners for each channel of a multi-channel receiver system, the present subject matter uses a single frequency tuner for receiving each channel of the multi-channel receiver system. A locked demodulator may be designated as a reference demodulator and frequency offset values associated with the reference demodulator may be applied to other demodulators of the multi-channel receiver. These frequency offset values may be used by individual demodulators of each channel for correcting corresponding frequency offsets.
Abstract:
Systems and methods for performing automatic frequency control are provided. Instead of relying on individual frequency tuners for each channel of a multi-channel receiver system, the present subject matter uses a single frequency tuner for receiving each channel of the multi-channel receiver system. A locked demodulator may be designated as a reference demodulator and frequency offset values associated with the reference demodulator may be applied to other demodulators of the multi-channel receiver. These frequency offset values may be used by individual demodulators of each channel for correcting corresponding frequency offsets.
Abstract:
Systems and methods for a non-data-aided (NDA) approach to advanced OFDM timing are provided. This approach allows for accurate OFDM symbol timing and synchronization by avoiding inter-symbol interference (ISI) in multipath environments where an earliest arriving signal may not be the strongest signal. The NDA approach may rely on generating and applying a bias correction to a combined correlation result of the multi-path signals.
Abstract:
Systems and methods are presented for transmitting additional data over preexisting differential COFDM signals by changing the amplitude of the legacy data symbols. In exemplary embodiments of the present invention, additional data capacity can be achieved for a COFDM signal which is completely backwards compatible with existing legacy satellite broadcast communications systems. In exemplary embodiments of the present invention, additional information can be overlaid on a legacy COFDM signal by applying an amplitude offset to the legacy symbols. In exemplary embodiments of the present invention, special receiver processing can be implemented to extract this additional information, which can include performing channel equalization across frequency bins to isolate the amplitude modulated overlay signal. For example, at each FFT symbol time, average power across neighboring active data bins can be used to determine the localized power at the corresponding FFT bins, and a channel inversion can then, for example, be performed on the data bins to restore, as best as possible, the original transmitted symbol amplitude.
Abstract:
Systems and methods are presented to improve the performance of a constant bit rate iterative decoder by providing elastic buffering, while utilizing a relatively simple decoder architecture capable of maintaining a fixed number of iterations of a lower value. An LDPC decoder can be designed, for example, to support less than the maximum possible number of iterations, and can, for example, be mated to elastic input and output buffers. If a given code block, or succession of code blocks, requires the maximum number of iterations for decoding, the decoder can, for example, run at such maximum number of iterations and the elastic input buffer can, for example, hold code blocks waiting to be processed so as to maintain a constant input rate. Alternatively, if one or more code blocks requires less than the nominal number of iterations, the output buffer can store those code blocks so as to preserve a constant output rate. It is emphasized that this abstract is provided to comply with the rules requiring an abstract, and is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.