1149.1TAP LINKING MODULES
    11.
    发明申请
    1149.1TAP LINKING MODULES 审中-公开
    1149.1TAP链接模块

    公开(公告)号:US20150260791A1

    公开(公告)日:2015-09-17

    申请号:US14728580

    申请日:2015-06-02

    CPC classification number: G01R31/3177 G01R31/31727 G01R31/318555

    Abstract: IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.

    Abstract translation: IEEE 1149.1测试接入端口(TAP)可用于IC和知识产权核心设计级别。 TAP用作用于访问IC和核心内的各种嵌入式电路的串行通信端口,包括: IEEE 1149.1边界扫描电路,内置测试电路,内部扫描电路,IEEE 1149.4混合信号测试电路,IEEE P5001在线仿真电路和IEEE P1532系统编程电路。 可选择地访问IC内的TAP是理想的,因为在许多情况下,仅能够访问期望的TAP导致在IC内可以执行测试,仿真和编程的方式的改进。 描述了一种TAP链接模块,其允许使用1149.1指令扫描操作来选择性地访问嵌入在IC内的TAP。

    Linking module with IC and core TAP output enable leads
    12.
    发明授权
    Linking module with IC and core TAP output enable leads 有权
    链接模块与IC和核心TAP输出使能引线

    公开(公告)号:US09075113B2

    公开(公告)日:2015-07-07

    申请号:US14230771

    申请日:2014-03-31

    CPC classification number: G01R31/3177 G01R31/31727 G01R31/318555

    Abstract: IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.

    Abstract translation: IEEE 1149.1测试接入端口(TAP)可用于IC和知识产权核心设计级别。 TAP用作用于访问IC和核心内的各种嵌入式电路的串行通信端口,包括: IEEE 1149.1边界扫描电路,内置测试电路,内部扫描电路,IEEE 1149.4混合信号测试电路,IEEE P5001在线仿真电路和IEEE P1532系统编程电路。 可选择地访问IC内的TAP是理想的,因为在许多情况下,仅能够访问期望的TAP导致在IC内可以执行测试,仿真和编程的方式的改进。 描述了一种TAP链接模块,其允许使用1149.1指令扫描操作来选择性地访问嵌入在IC内的TAP。

    1149.1 TAP LINKING MODULES
    13.
    发明申请

    公开(公告)号:US20130139017A1

    公开(公告)日:2013-05-30

    申请号:US13670078

    申请日:2012-11-06

    CPC classification number: G01R31/3177 G01R31/31727 G01R31/318555

    Abstract: IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for accessing a variety of embedded circuitry within ICs and cores including; IEEE 1149.1 boundary scan circuitry, built in test circuitry, internal scan circuitry, IEEE 1149.4 mixed signal test circuitry, IEEE P5001 in-circuit emulation circuitry, and IEEE P1532 in-system programming circuitry. Selectable access to TAPs within ICs is desirable since in many instances being able to access only the desired TAP(s) leads to improvements in the way testing, emulation, and programming may be performed within an IC. A TAP linking module is described that allows TAPs embedded within an IC to be selectively accessed using 1149.1 instruction scan operations.

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