公开(公告)号：US11204647B2

公开(公告)日：2021-12-21

申请号：US15952453

申请日：2018-04-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sandeep Rao ,  Sachin Bharadwaj ,  Piyali Goswami

IPC: G06F3/01 ,  G06F3/16 ,  G01S7/35 ,  G01S7/41 ,  G01S13/58 ,  G01S13/34

Abstract: A method for gesture recognition includes receiving, by a processor, a first digital intermediate frequency (IF) signal stream from a first receive antenna and receiving, by the processor, a second digital IF signal stream from a second receive antenna. The method also includes computing, by the processor, a weighted Doppler metric stream based on the first digital IF signal stream and the second digital IF signal stream and computing, by the processor, an angle metric stream based on the first digital IF signal stream and the second digital IF signal stream. Additionally, the method includes computing, by the processor, a correlation between the weighted Doppler metric stream and the angle metric stream, to generate a first correlation and recognizing, by the processor, a gesture, based on the first correlation.

公开(公告)号：US10996313B2

公开(公告)日：2021-05-04

申请号：US16173795

申请日：2018-10-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Piyali Goswami ,  Sandeep Rao ,  Sachin Bharadwaj

IPC: G01S7/40 ,  G01S7/41 ,  G01S13/536 ,  G01S13/56 ,  G01S7/35

Abstract: A method of operating a frequency modulated continuous wave (FMCW) radar system includes receiving, by at least one processor, digital intermediate frequency (IF) signals from a mixer coupled to a receive antenna. The method also includes computing, by the at least one processor, a motion metric based on the digital IF signals; operating, by the at least one processor, the FMCW radar system in a classification mode, in response to determining that the motion metric is above a threshold; and operating, by the at least one processor, the FMCW radar system in a detection mode, in response to determining that the motion metric is below the threshold for at least a first amount of time. An amount of power consumed by the FMCW radar system in the detection mode is less than an amount of power consumed by the FMCW radar system in the classification mode.

公开(公告)号：US20190116364A1

公开(公告)日：2019-04-18

申请号：US16213527

申请日：2018-12-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yashwant Dutt ,  Kumar Desappan ,  Piyali Goswami

IPC: H04N19/167 ,  H04N19/157 ,  H04N19/176 ,  H04N19/103 ,  H04N19/124

Abstract: Several methods and systems for masking multimedia data are disclosed. In an embodiment, a method for masking includes performing a prediction for at least one multimedia data block based on a prediction mode of a plurality of prediction modes. The at least one multimedia data block is associated with a region of interest (ROI). A residual multimedia data associated with the at least one multimedia data block is generated based on the prediction. A quantization of the residual multimedia data is performed based on a quantization parameter (QP) value. The QP value is variable such that varying the QP value controls a degree of masking of the ROI.

公开(公告)号：US20150296212A1

公开(公告)日：2015-10-15

申请号：US14684334

申请日：2015-04-11

Applicant: Texas Instruments Incorporated

Inventor： Dipan Kumar Mandal ,  Mihir Narendra Mody ,  Mahesh Madhukar Mehendale ,  Chaitanya Satish Ghone ,  Piyali Goswami ,  Naresh Kumar Yadav ,  Hetul Sanghvi ,  Niraj Nandan

IPC: H04N19/42 ,  G06F9/30 ,  H04N19/463 ,  G06F9/38

CPC classification number: H04N19/42 ,  G06F9/30181 ,  G06F9/3885 ,  H04N19/43 ,  H04N19/463

Abstract: A control processor for a video encode-decode engine is provided that includes an instruction pipeline. The instruction pipeline includes an instruction fetch stage coupled to an instruction memory to fetch instructions, an instruction decoding stage coupled to the instruction fetch stage to receive the fetched instructions, and an execution stage coupled to the instruction decoding stage to receive and execute decoded instructions. The instruction decoding stage and the instruction execution stage are configured to decode and execute a set of instructions in an instruction set of the control processor that are designed specifically for accelerating video sequence encoding and encoded video bit stream decoding.

Abstract translation: 提供了一种用于视频编码解码引擎的控制处理器，其包括指令流水线。 指令流水线包括与指令存储器耦合以取指令的指令提取级，耦合到指令提取级以接收所取指令的指令解码级，以及耦合到指令解码级的接收和执行解码指令的执行级。 指令解码级和指令执行级被配置为解码和执行专门用于加速视频序列编码和编码视频位流解码的控制处理器的指令集中的一组指令。