-
公开(公告)号：US12153161B2
公开(公告)日：2024-11-26
申请号：US17307044
申请日：2021-05-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Piyali Goswami , Sandeep Rao , Sachin Bharadwaj
IPC: G01S7/40 , G01S7/35 , G01S7/41 , G01S13/536 , G01S13/56
Abstract: A method of operating a frequency modulated continuous wave (FMCW) radar system includes receiving, by at least one processor, digital intermediate frequency (IF) signals from a mixer coupled to a receive antenna. The method also includes computing, by the at least one processor, a motion metric based on the digital IF signals; operating, by the at least one processor, the FMCW radar system in a classification mode, in response to determining that the motion metric is above a threshold; and operating, by the at least one processor, the FMCW radar system in a detection mode, in response to determining that the motion metric is below the threshold for at least a first amount of time. An amount of power consumed by the FMCW radar system in the detection mode is less than an amount of power consumed by the FMCW radar system in the classification mode.
-
公开(公告)号：US20240183968A1
公开(公告)日：2024-06-06
申请号：US18459116
申请日：2023-08-31
Applicant: Texas Instruments Incorporated
Inventor： Sandeep Rao , Karthik Subburaj , Karthik Ramasubramanian
CPC classification number: G01S13/584 , G01S7/352 , G01S2013/0254
Abstract: In described examples, a frequency modulated continuous wave (FMCW) radar system comprises a first FMCW device that includes a first processor and a second FMCW device that includes a second processor. The first and second processors respectively receive first and second set of FMCW signals corresponding to a field of view (FOV), and—independently from each other—process the first and second sets of FMCW signals to respectively generate first and second sets of virtual antenna array signals. The second FMCW device transmits the second set of virtual antenna array signals to the first FMCW device. The first processor determines angle of arrival information with respect to one or more objects in the FOV in response to the first and second sets of virtual antenna array signals.
-
公开(公告)号：US11899095B2
公开(公告)日：2024-02-13
申请号：US17132462
申请日：2020-12-23
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sandeep Rao
IPC: G01S13/58 , G01S13/931 , G01S7/35 , G01S13/34
CPC classification number: G01S13/584 , G01S7/352 , G01S13/34 , G01S13/931
Abstract: Systems and methods are provided for Doppler processing for frequency-modulated continuous wave (FMCW) radar systems. Range-gate data representing the position of an object within a region of interest is generated at a radar sensor. A first Doppler Fast Fourier Transform (Doppler-FFT) is performed on the range-gate data to provide a first set of Doppler-FFT data. A velocity associated with a signal amplitude that exceeds a noise floor is identified in the first set of Doppler-FFT data. A correction value for the range-gate data is determined from the identified velocity. The range-gate data is modified using the determined correction value to provide modified range-gate data. A second Doppler-FFT is performed on the modified range-gate data to provide a second set of Doppler-FFT data.
-
公开(公告)号：US11747487B2
公开(公告)日：2023-09-05
申请号：US15935071
申请日：2018-03-26
Applicant: Texas Instruments Incorporated
Inventor： Sashidharan Venkatraman , Sandeep Rao
Abstract: The disclosure provides a GNSS receiver. The GNSS receiver a measurement engine that generates a set of doppler measurements and a set of pseudo ranges in response to an input signal. A clock frequency drift estimation (CFDE) block receives the set of doppler measurements, and generates an averaged delta doppler. A position estimation engine estimates a position and velocity of a user based on the set of doppler measurements, the set of pseudo ranges and the averaged delta doppler.
-
公开(公告)号：US11662455B2
公开(公告)日：2023-05-30
申请号：US17183406
申请日：2021-02-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sachin Bharadwaj , Sandeep Rao
CPC classification number: G01S13/583 , G01S7/021 , G01S7/4056 , G01S13/343
Abstract: A radar data processing device includes at least one analog-to-digital converter (ADC) configured to digitize a plurality of input signals, wherein each input signal includes radar chirp and radar chirp reflection information received at one of a plurality of receiver antennas. The radar data processing device also includes Fast Fourier Transform (FFT) logic configured to generate FFT output samples based on each digitized input signal, wherein at least some of the generated FFT output samples are across antenna FFT output samples associated with at least two of the plurality of receiver antennas. The radar data processing device also includes a processor configured to determine a plurality of object parameters based on at least some of the generated FFT output samples, wherein the processor uses a neural network classifier trained to provide a confidence metric for at least one of the plurality of object parameters.
-
Patent Agency Ranking
6.发明申请公开(公告)号：US20220342036A1
公开(公告)日：2022-10-27
申请号：US17856109
申请日：2022-07-01
Applicant: Texas Instruments Incorporated
Inventor： Sandeep Rao , Karthik Subburaj , Dan Wang , Adeel Ahmad
Abstract: In accordance with described examples, a method determines if a velocity of an object detected by a radar is greater than a maximum velocity by receiving on a plurality of receivers at least one frame of chirps transmitted by at least two transmitters and reflected off of the object. A velocity induced phase shift (φd) in a virtual array vector S of signals received by each receiver corresponding to a sequence of chirps (frame) transmitted by each transmitter is estimated. Phases of each element of virtual array vector S are corrected using φd to generate a corrected virtual array vector Sc. A first Fourier transform is performed on the corrected virtual array vector Sc to generate a corrected virtual array spectrum to detect a signature that indicates that the object has an absolute velocity greater than a maximum velocity.
-
公开(公告)号：US11456713B2
公开(公告)日：2022-09-27
申请号：US16851558
申请日：2020-04-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sandeep Rao , Brian Ginsburg
IPC: H03F3/217 , G01S3/14 , G01S7/35 , G01S13/34 , G01S13/42 , G01S13/931 , H01Q1/22 , H01Q3/26 , H03B5/12 , H03F3/24 , H03F3/45 , G01S13/00
Abstract: Disclosed examples include a radar system that operates in a first mode and a second mode. In the first mode, the system detects the presence of an object within a threshold range. In response to detection of the presence of the object, the system transitions to the second mode, and the system generates range data, velocity data, and angle data of the object in the second mode. When the object is no longer detected within the threshold range, the system transitions back to the first mode.
-
公开(公告)号：US11131761B2
公开(公告)日：2021-09-28
申请号：US16897309
申请日：2020-06-10
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sandeep Rao
Abstract: A method of estimating position of an obstacle of a plurality of obstacles with a radar apparatus. An azimuth frequency, an elevation frequency and a range of the obstacle are estimated to generate an estimated azimuth frequency, an estimated elevation frequency and an estimated range of the obstacle. A metric is estimated from one or more of the estimated azimuth frequency, the estimated elevation frequency and the estimated range of the obstacle. The metric is compared to a threshold to detect an error in at least one of the estimated azimuth frequency and the estimated elevation frequency. On error detection, a sign of at least one of the estimated azimuth frequency and the estimated elevation frequency is inverted to generate a true estimated azimuth frequency and a true estimated elevation frequency respectively.
-
公开(公告)号：US20200174884A1
公开(公告)日：2020-06-04
申请号：US16788004
申请日：2020-02-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sandeep Rao , Karthik Ramasubramanian , Brian Paul Ginsburg
Abstract: Data memory protection is provided for a signal processing system such as a radar system in which the data memory is protected with a common set of parity bits rather than requiring a set of parity bits for each memory word as in Error Correction Coded (ECC) memories. The common set of parity bits may be updated as memory words in the data memory are accessed as part of signal processing of one or more digital signals. The memory protection ensures that in the absence of memory errors the common parity bits are zero at the end of processing the digital signals as long as each word in the data memory that is used for storing the signal processing data is written and read an equal number of times.
-
公开(公告)号：US20190331765A1
公开(公告)日：2019-10-31
申请号：US16442152
申请日：2019-06-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Sandeep Rao , Karthik Ramasubramanian , Indu Prathapan , Raghu Ganesan , Pankaj Gupta
Abstract: A radar hardware accelerator (HWA) includes a fast Fourier transform (FFT) engine including a pre-processing block for providing interference mitigation and/or multiplying a radar data sample stream received from ADC buffers within a split accelerator local memory that also includes output buffers by a pre-programmed complex scalar or a specified sample from an internal look-up table (LUT) to generate pre-processed samples. A windowing plus FFT block (windowed FFT block) is for multiply the pre-processed samples by a window vector and then processing by an FFT block for performing a FFT to generate Fourier transformed samples. A post-processing block is for computing a magnitude of the Fourier transformed samples and performing a data compression operation for generating post-processed radar data. The pre-processing block, windowed FFT block and post-processing block are connected in one streaming series data path.
-
-
-
-
-
-
-
-
-
Search Results
112
records
(took 0.033 seconds)
