公开(公告)号：US20210050782A1

公开(公告)日：2021-02-18

申请号：US16860511

申请日：2020-04-28

Applicant: Texas Instruments Incorporated

Inventor： Saurav Bandyopadhyay ,  Thomas Matthew LaBella ,  Huy Le Nhat Nguyen ,  Michael G. Amaro ,  Robert Allan Neidorff

IPC: H02M3/158 ,  H03K17/082 ,  G06F1/26

Abstract: A switch-mode power supply circuit includes a low-side switching transistor, a high-side switching transistor, a low-side current sensing circuit, and a gate driver circuit. The low-side current sensing circuit is coupled to the low-side switching transistor and is configured to sense a current flowing through the low-side switching transistor. The gate driver circuit is coupled to the low-side current sensing circuit and the high-side switching transistor. The gate driver circuit is configured to generate a signal having a first drive strength to switch the high-side switching transistor based on current flowing through the low-side switching transistor being less than a threshold current, and to generate a signal having a second drive strength to switch the high-side switching transistor based on current flowing through the low-side switching transistor being greater than the threshold current. The first drive strength is greater than the second drive strength.

公开(公告)号：US20200067410A1

公开(公告)日：2020-02-27

申请号：US16670638

申请日：2019-10-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Thomas Matthew LaBella ,  Michael G. Amaro ,  Jeffrey Anthony Morroni

IPC: H02M3/158 ,  H02M1/08

Abstract: Timing circuitry causes: a first closed signal on a first switch control output before a signal on a second switch control output changes from a second closed signal to a first open signal; the first switch control output to provide a second open signal after a first selected time after the second switch control output changes from the second closed signal to the first open signal; and a third switch control output to provide a third closed signal a second selected time after the first switch control output changes from the first closed signal to a third open signal. A beginning of the first closed signal to a beginning of the first open signal is based on a later of: a current through a switch connected to the second switch control output exceeding a threshold current; and a clocked time after the beginning of the first closed signal.

公开(公告)号：US10177658B2

公开(公告)日：2019-01-08

申请号：US15350697

申请日：2016-11-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Thomas Matthew LaBella ,  Michael G. Amaro ,  Jeffrey Anthony Morroni

IPC: H02M3/158 ,  H02M1/08 ,  H02M1/00

Abstract: Described examples include a method of controlling a power converter including executing a plurality of cycles. Each cycle includes turning on a first switch during a first period, the first switch coupled between a power supply and an output inductance; turning on a second switch during a second period, the second switch coupled between an output inductance and ground; turning on a third switch at a first time during the second period, the third switch coupled between the power supply and an auxiliary inductance; and turning on a fourth switch on at a third time after the second time, the fourth switch coupled the auxiliary inductance and ground. The second period ends at a third time period after the first time based on a later of an overlap time and a current through a switch connected to the second switch current handling terminal exceeding a threshold current.

公开(公告)号：US09853547B2

公开(公告)日：2017-12-26

申请号：US15396466

申请日：2016-12-31

Applicant: Texas Instruments Incorporated

Inventor： Saurav Bandyopadhyay ,  Thomas Matthew LaBella

IPC: H02M3/158 ,  H02M1/08 ,  H02M1/00

CPC classification number: H02M3/158 ,  H02M1/08 ,  H02M2001/0058

Abstract: An example apparatus includes a first switch having a control terminal, coupled to a voltage source and coupled to a switch node; a second switch having a control terminal, coupled to the switch node and to a voltage reference; a first inductor coupled to the switch node and to a load; a third switch having a control terminal, coupled to the voltage source and to an auxiliary node; a fourth switch having a control terminal, coupled to the auxiliary node and to the voltage reference; a second inductor coupled to the switch node and the auxiliary node; a fifth switch having a control terminal, coupled to the switch node and to the auxiliary node; and timing circuitry configured to output signals to the control terminals of the first switch, the second switch, the third switch, the fourth switch and the fifth switch to supply current to the load.