公开(公告)号：US20220216315A1

公开(公告)日：2022-07-07

申请号：US17698748

申请日：2022-03-18

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Chu LIN ,  Chi-Chung JEN ,  Chia-Ming PAN ,  Su-Yu YEH ,  Keng-Ying LIAO ,  Chih-Wei SUNG

IPC: H01L29/423 ,  H01L27/11521 ,  H01L29/66 ,  H01L21/28 ,  H01L29/788

Abstract: A method includes depositing a gate dielectric film over a substrate. A floating gate layer and a control gate layer are deposited over the gate dielectric film. The control gate layer is patterned to form a control gate over the floating gate layer. A top portion of the floating gate layer is patterned. A spacer structure is formed on a sidewall of the control gate and over a remaining portion of the floating gate layer. The remaining portion of the floating gate layer is patterned to form a bottom portion of a floating gate. A ratio of the bottom width of the bottom portion to the middle width of the bottom portion is in a range between about 103% and about 108%. The gate dielectric film is patterned form a gate dielectric layer.

公开(公告)号：US20210225918A1

公开(公告)日：2021-07-22

申请号：US16746720

申请日：2020-01-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chin-Yu LIN ,  Keng-Ying LIAO ,  Su-Yu YEH ,  Po-Zen CHEN ,  Huai-Jen TUNG ,  Hsien-Li CHEN

IPC: H01L27/146

Abstract: An image sensor structure includes a semiconductor device, a plurality of image sensing elements formed in the semiconductor substrate, an interconnect structure formed on the semiconductor substrate, and a composite grid structure over the semiconductor substrate. The composite grid structure includes a tungsten grid, an oxide grid over the tungsten grid, and an adhesion enhancement grid spacing the tungsten grid from the oxide grid.

公开(公告)号：US20210036118A1

公开(公告)日：2021-02-04

申请号：US16879559

申请日：2020-05-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yu-Chu LIN ,  Chi-Chung JEN ,  Chia-Ming PAN ,  Su-Yu YEH ,  Keng-Ying LIAO ,  Chih-Wei SUNG

IPC: H01L29/423 ,  H01L27/11521 ,  H01L29/788 ,  H01L21/28 ,  H01L29/66

Abstract: A memory device includes a floating gate, a control gate, a spacer structure, a dielectric layer, and an erase gate. The floating gate is above a substrate. The floating gate has a curved sidewall. The control gate is above the floating gate. The spacer structure is in contact with the control gate and the floating gate. The spacer structure is spaced apart from the curved sidewall of the floating gate. The dielectric layer is in contact with the spacer structure and the curved sidewall of the floating gate. The erase gate is above the dielectric layer.

公开(公告)号：US20200373344A1

公开(公告)日：2020-11-26

申请号：US16422271

申请日：2019-05-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Huai-jen TUNG ,  Ching-Chung SU ,  Keng-Ying LIAO ,  Po-Zen CHEN ,  Su-Yu YEH ,  S.Y. CHEN

IPC: H01L27/146 ,  H01L23/00

Abstract: The present disclosure describes the formation of a pad structure in an image sensor device using a sacrificial isolation region and a silicon oxide based stack with no intervening nitride etch-stop layers. The image sensor device includes a semiconductor layer comprising a first horizontal surface opposite to a second horizontal surface; a metallization layer formed on the second horizontal surface of the semiconductor layer, where the metallization layer includes a dielectric layer. The image sensor device also includes a pad region traversing through the semiconductor layer from the first horizontal surface to the second horizontal surface. The pad region includes an oxide layer with no intervening nitride layers formed on the dielectric layer of the metallization layer and a pad structure in physical contact with a conductive structure of the metallization layer.