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公开(公告)号:US20090013297A1
公开(公告)日:2009-01-08
申请号:US12233784
申请日:2008-09-19
IPC分类号: G06F17/50
CPC分类号: G06F17/5068 , G06F2217/12 , Y02P90/265
摘要: A method generates a design layout for an integrated circuit. A design is provided for an integrated circuit. Library cells are selected according to the design. The library cells are mapped into a chip area map. Unmapped cells are filled with filler cells. Critical cells of the library cells are selected. The selected critical cells are altered with respect to contact resistance and/or contact capacitance. The map including the altered cells is provided as the design layout.
摘要翻译: 一种方法生成集成电路的设计布局。 为集成电路提供了一种设计。 库细胞根据设计选择。 库单元被映射到芯片区域图。 未照射的电池填充有填充电池。 选择文库细胞的临界细胞。 所选择的临界电池相对于接触电阻和/或接触电容而改变。 提供包含改变的单元格的地图作为设计布局。
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公开(公告)号:US20070277137A1
公开(公告)日:2007-11-29
申请号:US11440657
申请日:2006-05-24
IPC分类号: G06F17/50
CPC分类号: G06F17/5068 , G06F2217/12 , Y02P90/265
摘要: A method generates a design layout for an integrated circuit. A design is provided for an integrated circuit. Library cells are selected according to the design. The library cells are mapped into a chip area map. Unmapped cells are filled with filler cells. Critical cells of the library cells are selected. The selected critical cells are altered with respect to contact resistance and/or contact capacitance. The map including the altered cells is provided as the design layout.
摘要翻译: 一种方法生成集成电路的设计布局。 为集成电路提供了一种设计。 库细胞根据设计选择。 库单元被映射到芯片区域图。 未照射的电池填充有填充电池。 选择文库细胞的临界细胞。 所选择的临界电池相对于接触电阻和/或接触电容而改变。 提供包含改变的单元格的地图作为设计布局。
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公开(公告)号:US07441218B2
公开(公告)日:2008-10-21
申请号:US11440657
申请日:2006-05-24
IPC分类号: G06F17/50
CPC分类号: G06F17/5068 , G06F2217/12 , Y02P90/265
摘要: A method generates a design layout for an integrated circuit. A design is provided for an integrated circuit. Library cells are selected according to the design. The library cells are mapped into a chip area map. Unmapped cells are filled with filler cells. Critical cells of the library cells are selected. The selected critical cells are altered with respect to contact resistance and/or contact capacitance. The map including the altered cells is provided as the design layout.
摘要翻译: 一种方法生成集成电路的设计布局。 为集成电路提供了一种设计。 库细胞根据设计选择。 库单元被映射到芯片区域图。 未照射的电池填充有填充电池。 选择文库细胞的临界细胞。 所选择的临界电池相对于接触电阻和/或接触电容而改变。 提供包含改变的单元格的地图作为设计布局。
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