公开(公告)号：US20240214111A1

公开(公告)日：2024-06-27

申请号：US18086528

申请日：2022-12-21

Applicant: XILINX, INC.

Inventor： Steven Leslie POPE ,  Derek Edward ROBERTS ,  David James RIDDOCH ,  Ripduman Singh SOHAN

IPC: H04L1/00 ,  H04L1/1829

CPC classification number: H04L1/0083 ,  H04L1/0045 ,  H04L1/1858

Abstract: A network interface device comprises circuitry to add a frame check sequence value a data packet to be transmitted onto a network. The data packet with the frame check sequence value is stored in memory. Media access control layer circuitry reads the data packet from the memory and determines if the frame check sequence value is correct. When it is note correct, it is determined that the data in the data packet is corrupted.

公开(公告)号：US20240061799A1

公开(公告)日：2024-02-22

申请号：US17892949

申请日：2022-08-22

Applicant: XILINX, INC.

Inventor： Jaideep DASTIDAR ,  David James RIDDOCH ,  Steven Leslie POPE

IPC: G06F13/40 ,  G06F13/28

CPC classification number: G06F13/4027 ,  G06F13/28

Abstract: An integrated circuit device includes multiple heterogeneous functional circuit blocks and interface circuitry that permits the heterogeneous functional circuit blocks to exchange data with one another using communication protocols of the respective heterogeneous functional circuit blocks. The IC device includes fixed-function circuitry, user-configurable circuitry (e.g., programmable logic), and/or embedded processors/cores. A functional circuit block may be configured in fixed-function circuitry or in the user-configurable circuitry (i.e., as a plug-in). The interface circuitry includes a network-on-a-chip (NoC), an adaptor configured in the user-configurable circuitry, and/or memory. The memory may be accessible to the functional circuit blocks through an adaptor configured the user-configurable circuitry and/or through the NoC. The IC device may be configured as a SmartNIC, DPU, or other type of system-on-a-chip (SoC).

公开(公告)号：US20220294883A1

公开(公告)日：2022-09-15

申请号：US17199202

申请日：2021-03-11

Applicant: XILINX, INC.

Inventor： Steven Leslie POPE ,  Derek Edward ROBERTS ,  Dmitri KITARIEV ,  Neil Duncan TURTON ,  David James RIDDOCH ,  Ripduman SOHAN

IPC: H04L29/06 ,  H04L29/08 ,  H04L12/801

Abstract: A network interface device comprises an input configured to receive a storage response comprising a plurality of packets of data, one or more packets comprising a header part and data to be stored, the header part comprising a transport protocol header and a data storage application header. A first packet processor is configured to receive two or more of said plurality of packets and perform transport protocol processing of the received packets to provide transport protocol processed packets A second packet processor configured to receive the transport protocol processed packets from the first packet processor, to write the data to be stored of the received packets to memory and to provide the data storage application header and a pointer to a location in the memory to which the data has been written.