公开(公告)号：US20180356294A1

公开(公告)日：2018-12-13

申请号：US15616765

申请日：2017-06-07

Applicant: Xilinx, Inc.

Inventor： Umanath R. Kamath ,  Padraig Kelly ,  John K. Jennings

IPC: G01K7/01 ,  H03K19/003 ,  H03K19/0175

CPC classification number: G01K7/01 ,  G01K1/026 ,  G01K7/015 ,  H03K19/00307 ,  H03K19/017581

Abstract: An example dynamic element matching (DEM) circuit includes: a plurality of bipolar junction transistors (BJTs), each of the plurality of BJTs having a base terminal and a collector terminal coupled to electrical ground; a plurality of pairs of force switches, each pair of force switches coupled to an emitter of a respective one of the plurality of BJTs; a plurality of pairs of sense switches, where each pair of sense switches is coupled to the emitter of a respective one of the plurality of BJTs, a first switch in each pair of sense switches is coupled to a first node, and a second switch in each pair of sense switches is coupled to a second node; a first current source coupled to a first switch in each pair of force switches; and a second current source coupled to a second switch in each pair of force switches.

公开(公告)号：US20180074533A1

公开(公告)日：2018-03-15

申请号：US15266947

申请日：2016-09-15

Applicant: Xilinx, Inc.

Inventor： Umanath R. Kamath ,  John K. Jennings

IPC: G05F1/46

CPC classification number: G05F1/468

Abstract: An integrated circuit includes a reference voltage circuit. The reference voltage circuit includes a bipolar junction transistor (BJT) configured to receive a first current during a first phase of a clock cycle to generate a first base-emitter junction voltage, and receive a second current during a second phase of the clock cycle to generate a second base-emitter junction voltage. The reference voltage circuit includes a switched capacitor circuit configured to provide a reference voltage associated with the first base-emitter junction voltage and the second base-emitter junction voltage.