CMOS image sensor having a crosstalk prevention structure
    11.
    发明授权
    CMOS image sensor having a crosstalk prevention structure 有权
    具有串扰防止结构的CMOS图像传感器

    公开(公告)号:US08138530B2

    公开(公告)日:2012-03-20

    申请号:US12482960

    申请日:2009-06-11

    IPC分类号: H01L31/062

    CPC分类号: H01L27/1463 H01L27/14603

    摘要: In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep P+ type well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.

    摘要翻译: 在CMOS图像传感器的制造方法中,在N型基板上形成P型外延层。 在P型外延层中形成深P +型阱层。 在光电二极管防护区域内形成N型深护卫阱。 N型深护卫区与N型基板接触,并与工作电压端子连接。 三重阱形成在光电二极管区域和外围电路区域中。 三阱用于形成具有不同工作电压的PMOS和NMOS。 在光电二极管区域中形成隔离区。 光电二极管区域中的隔离区域具有与外围电路区域中的隔离区域的深度不同的深度。

    COMS image sensors and methods of manufacturing the same
    12.
    发明申请
    COMS image sensors and methods of manufacturing the same 有权
    COMS图像传感器及其制造方法

    公开(公告)号:US20110163363A1

    公开(公告)日:2011-07-07

    申请号:US13064289

    申请日:2011-03-16

    IPC分类号: H01L27/146

    摘要: Complementary metal-oxide semiconductor (CMOS) image sensors (CIS) and methods of manufacturing the same are provided, the sensors include an epitaxial layer on a substrate in which a first, second, third and fourth region are defined. A photodiode may be formed at an upper portion of the epitaxial layer in the first region. A plurality of gate structures may be formed on the epitaxial layer in the second, third and fourth regions. A first blocking layer may be formed on the gate structures and the epitaxial layer in the first and second regions. A first impurity layer may be formed at an upper portion of the epitaxial layer adjacent to the gate structures in the second region, and a second impurity layer at upper portions of the epitaxial layer adjacent to the gate structures in the third and fourth regions. A color filter layer may be formed over the photodiode. A microlens may be formed on the color filter layer.

    摘要翻译: 提供互补金属氧化物半导体(CMOS)图像传感器(CIS)及其制造方法,传感器包括在其中限定了第一,第二,第三和第四区域的基板上的外延层。 可以在第一区域中的外延层的上部形成光电二极管。 可以在第二,第三和第四区域中的外延层上形成多个栅极结构。 可以在栅极结构和第一和第二区域中的外延层上形成第一阻挡层。 可以在与第二区域中的栅极结构相邻的外延层的上部形成第一杂质层,并且在第三和第四区域中与栅极结构相邻的外延层的上部处形成第二杂质层。 可以在光电二极管上方形成滤色器层。 可以在滤色器层上形成微透镜。

    Methods of manufacturing CMOS image sensors
    13.
    发明授权
    Methods of manufacturing CMOS image sensors 有权
    CMOS图像传感器的制造方法

    公开(公告)号:US07932120B2

    公开(公告)日:2011-04-26

    申请号:US12461903

    申请日:2009-08-27

    IPC分类号: H01L21/00 H01L21/8238

    摘要: Complementary metal-oxide semiconductor (CMOS) image sensors (CIS) and methods of manufacturing the same are provided, the sensors include an epitaxial layer on a substrate in which a first, second, third and fourth region are defined. A photodiode may be formed at an upper portion of the epitaxial layer in the first region. A plurality of gate structures may be formed on the epitaxial layer in the second, third and fourth regions. A first blocking layer may be formed on the gate structures and the epitaxial layer in the first and second regions. A first impurity layer may be formed at an upper portion of the epitaxial layer adjacent to the gate structures in the second region, and a second impurity layer at upper portions of the epitaxial layer adjacent to the gate structures in the third and fourth regions. A color filter layer may be formed over the photodiode. A microlens may be formed on the color filter layer.

    摘要翻译: 提供互补金属氧化物半导体(CMOS)图像传感器(CIS)及其制造方法,传感器包括在其中限定了第一,第二,第三和第四区域的基板上的外延层。 可以在第一区域中的外延层的上部形成光电二极管。 可以在第二,第三和第四区域中的外延层上形成多个栅极结构。 可以在栅极结构和第一和第二区域中的外延层上形成第一阻挡层。 可以在与第二区域中的栅极结构相邻的外延层的上部形成第一杂质层,并且在第三和第四区域中与栅极结构相邻的外延层的上部处形成第二杂质层。 可以在光电二极管上方形成滤色器层。 可以在滤色器层上形成微透镜。

    Methods of manufacturing CMOS image sensors
    14.
    发明申请
    Methods of manufacturing CMOS image sensors 有权
    CMOS图像传感器的制造方法

    公开(公告)号:US20100055823A1

    公开(公告)日:2010-03-04

    申请号:US12461903

    申请日:2009-08-27

    IPC分类号: H01L31/18

    摘要: Complementary metal-oxide semiconductor (CMOS) image sensors (CIS) and methods of manufacturing the same are provided, the sensors include an epitaxial layer on a substrate in which a first, second, third and fourth region are defined. A photodiode may be formed at an upper portion of the epitaxial layer in the first region. A plurality of gate structures may be formed on the epitaxial layer in the second, third and fourth regions. A first blocking layer may be formed on the gate structures and the epitaxial layer in the first and second regions. A first impurity layer may be formed at an upper portion of the epitaxial layer adjacent to the gate structures in the second region, and a second impurity layer at upper portions of the epitaxial layer adjacent to the gate structures in the third and fourth regions. A color filter layer may be formed over the photodiode. A microlens may be formed on the color filter layer.

    摘要翻译: 提供互补金属氧化物半导体(CMOS)图像传感器(CIS)及其制造方法,传感器包括在其中限定了第一,第二,第三和第四区域的基板上的外延层。 可以在第一区域中的外延层的上部形成光电二极管。 可以在第二,第三和第四区域中的外延层上形成多个栅极结构。 可以在栅极结构和第一和第二区域中的外延层上形成第一阻挡层。 可以在与第二区域中的栅极结构相邻的外延层的上部形成第一杂质层,并且在第三和第四区域中与栅极结构相邻的外延层的上部处形成第二杂质层。 可以在光电二极管上方形成滤色器层。 可以在滤色器层上形成微透镜。

    CMOS Image sensor having a crosstalk prevention structure
    15.
    发明申请
    CMOS Image sensor having a crosstalk prevention structure 有权
    CMOS图像传感器具有串扰防止结构

    公开(公告)号:US20090309144A1

    公开(公告)日:2009-12-17

    申请号:US12482960

    申请日:2009-06-11

    IPC分类号: H01L31/112

    CPC分类号: H01L27/1463 H01L27/14603

    摘要: In a method of manufacturing a CMOS image sensor, a P type epitaxial layer is formed on an N type substrate. A deep P+ type well layer is formed in the P type epitaxial layer. An N type deep guardring well is formed in a photodiode guardring region. The N type deep guardring region makes contact with the N type substrate and also be connected with an operational voltage terminal. A triple well is formed in a photodiode region and a peripheral circuit region. The triple well is used for forming a PMOS and an NMOS having different operational voltages. An isolation region is formed in the photodiode region. The isolation region in the photodiode region has a depth different from a depth of an isolation region in the peripheral circuit region.

    摘要翻译: 在制造CMOS图像传感器的方法中,在N型衬底上形成P型外延层。 在P型外延层中形成深P +型阱层。 在光电二极管防护区域内形成N型深护卫阱。 N型深护卫区与N型基板接触,并与工作电压端子连接。 三重阱形成在光电二极管区域和外围电路区域中。 三阱用于形成具有不同工作电压的PMOS和NMOS。 在光电二极管区域中形成隔离区。 光电二极管区域中的隔离区域具有与外围电路区域中的隔离区域的深度不同的深度。

    CMOS image sensors
    16.
    发明授权
    CMOS image sensors 有权
    CMOS图像传感器

    公开(公告)号:US08309996B2

    公开(公告)日:2012-11-13

    申请号:US13064289

    申请日:2011-03-16

    IPC分类号: H01L31/113

    摘要: Complementary metal-oxide semiconductor (CMOS) image sensors (CIS) and methods of manufacturing the same are provided, the sensors include an epitaxial layer on a substrate in which a first, second, third and fourth region are defined. A photodiode may be formed at an upper portion of the epitaxial layer in the first region. A plurality of gate structures may be formed on the epitaxial layer in the second, third and fourth regions. A first blocking layer may be formed on the gate structures and the epitaxial layer in the first and second regions. A first impurity layer may be formed at an upper portion of the epitaxial layer adjacent to the gate structures in the second region, and a second impurity layer at upper portions of the epitaxial layer adjacent to the gate structures in the third and fourth regions. A color filter layer may be formed over the photodiode. A microlens may be formed on the color filter layer.

    摘要翻译: 提供互补金属氧化物半导体(CMOS)图像传感器(CIS)及其制造方法,传感器包括在其中限定了第一,第二,第三和第四区域的基板上的外延层。 可以在第一区域中的外延层的上部形成光电二极管。 可以在第二,第三和第四区域中的外延层上形成多个栅极结构。 可以在栅极结构和第一和第二区域中的外延层上形成第一阻挡层。 可以在与第二区域中的栅极结构相邻的外延层的上部形成第一杂质层,并且在第三和第四区域中与栅极结构相邻的外延层的上部形成第二杂质层。 可以在光电二极管上方形成滤色器层。 可以在滤色器层上形成微透镜。

    Image sensor and method of fabricating the same
    19.
    发明授权
    Image sensor and method of fabricating the same 有权
    图像传感器及其制造方法

    公开(公告)号:US07514284B2

    公开(公告)日:2009-04-07

    申请号:US11223707

    申请日:2005-09-09

    IPC分类号: H01L21/00

    摘要: Image sensors and methods of fabricating the same are provided. The image sensor includes a blocking pattern disposed on photodiodes. The blocking pattern is formed of insulation material having a metal diffusion coefficient which is lower than a silicon oxide diffusion coefficient. Therefore, dark defects of the image sensor are reduced. In addition, the image sensor includes a color-ratio control layer. The color ratio control layer controls color ratios between the sensitivities to blue, green and red. As a result, color distinction of the picture that is embodied by the image sensor can be improved.

    摘要翻译: 提供了图像传感器及其制造方法。 图像传感器包括设置在光电二极管上的阻挡图案。 阻挡图案由具有低于氧化硅扩散系数的金属扩散系数的绝缘材料形成。 因此,图像传感器的暗缺陷减少。 此外,图像传感器包括色比控制层。 颜色比例控制层控制对蓝色,绿色和红色的敏感度之间的颜色比。 结果,可以提高由图像传感器实现的图像的颜色区别。

    Semiconductor integrated circuit device and method of fabricating the same
    20.
    发明申请
    Semiconductor integrated circuit device and method of fabricating the same 审中-公开
    半导体集成电路器件及其制造方法

    公开(公告)号:US20060291115A1

    公开(公告)日:2006-12-28

    申请号:US11472374

    申请日:2006-06-22

    IPC分类号: H02H9/00

    CPC分类号: H01L27/14601 H01L27/1463

    摘要: Provided are a semiconductor integrated circuit (IC) device and a method of fabricating the same. The semiconductor IC device may include first, second and third deep wells of a first conductivity type formed in a semiconductor substrate, and electrically isolated from one another; first and second wells of a second conductivity type and an active pixel sensor (APS) array formed between a top surface of the semiconductor substrate and the first, second and third deep wells, respectively; and first, second and third protective wells of the first conductivity type formed in the semiconductor substrate. The first and second wells of the second conductivity type and the APS array may be connected to different power supply voltages. The first, second and third protective wells of the first conductivity type may surround side surfaces of the first and second wells and the APS array, respectively.

    摘要翻译: 提供一种半导体集成电路(IC)装置及其制造方法。 半导体IC器件可以包括形成在半导体衬底中并且彼此电隔离的第一导电类型的第一,第二和第三深阱; 分别形成在半导体衬底的顶表面和第一,第二和第三深孔之间的第二导电类型的第一和第二阱和有源像素传感器(APS)阵列; 以及形成在半导体衬底中的第一导电类型的第一,第二和第三保护阱。 第二导电类型的第一和第二阱和APS阵列可以连接到不同的电源电压。 第一导电类型的第一,第二和第三保护阱可分别围绕第一和第二阱和APS阵列的侧表面。