公开(公告)号：US20140331449A1

公开(公告)日：2014-11-13

申请号：US13889532

申请日：2013-05-08

Applicant: Hui-Chen Chang

Inventor： Hui-Chen Chang

IPC: E05F3/12

CPC classification number: E05F3/12 ,  E05F3/104 ,  Y10T16/27 ,  Y10T16/2777 ,  Y10T16/56 ,  Y10T16/568 ,  Y10T16/593

Abstract: An adjustable door closer has a hollow pedestal with a first and a second chamber as well as an actuating groove. An actuating device is set into the actuating groove. A first piston assembly is set into the first chamber and a second piston assembly set into the second chamber. A partition wall is formed between the first and second chambers. Due to a laterally configured flow resistance unit, the holes to be set into the first and second chambers are reduced to three, including a no connecting hole and first and second backflow bypass holes, all of which are connected only to the second chamber from the partition wall. As such, the flow path structure is simplified compared to the five holes required for typical structures. The adjustable door closer could reduce significantly the manufacturing cost and realize better regulating functions with improved applicability and economic benefits.

Abstract translation: 可调门关闭器具有带有第一和第二室以及致动槽的中空基座。 致动装置设置在致动槽中。 第一活塞组件设置在第一腔室中，第二活塞组件设置在第二腔室中。 在第一和第二室之间形成分隔壁。 由于横向设置的流阻单元，要设置到第一和第二腔室中的孔减少到三个，包括一个无连接孔和第一和第二回流旁路孔，所有这些孔仅从第二室连接到第二室 隔墙。 因此，与典型结构所需的五个孔相比，流路结构被简化。 可调门关闭器可大大降低制造成本，实现更好的调节功能，提高适用性和经济效益。

公开(公告)号：US07589385B2

公开(公告)日：2009-09-15

申请号：US11161170

申请日：2005-07-26

Applicant: Chien-Ting Lin ,  Liang-Wei Chen ,  Che-Hua Hsu ,  Meng-Lin Lee ,  Hui-Chen Chang ,  Wei-Tsun Shiau

Inventor： Chien-Ting Lin ,  Liang-Wei Chen ,  Che-Hua Hsu ,  Meng-Lin Lee ,  Hui-Chen Chang ,  Wei-Tsun Shiau

IPC: H01L27/92

CPC classification number: H01L21/823864 ,  H01L21/823807 ,  H01L29/7843

Abstract: A CMOS transistor device including a tensile-stressed NMOS transistor and a PMOS transistor is disclosed. The NMOS transistor includes a gate, a gate oxide layer between the gate and semiconductor substrate, a silicon oxide offset spacer on sidewalls of the gate, N type lightly doped source/drain implanted into the semiconductor substrate next to the silicon oxide offset spacer, N type heavily doped source/drain implanted into the semiconductor substrate next to the N type lightly doped source/drain, and tensile-stressed silicon nitride layer covering the gate, the N type lightly doped source/drain, and the N type heavily doped source/drain.

Abstract translation: 公开了一种包括拉伸应力NMOS晶体管和PMOS晶体管的CMOS晶体管器件。 NMOS晶体管包括栅极，栅极和半导体衬底之间的栅极氧化物层，栅极侧壁上的氧化硅偏移间隔物，注入到氧化硅偏移间隔物旁边的半导体衬底中的N型轻掺杂源/漏极，N 在N型轻掺杂源极/漏极旁边注入到半导体衬底中的重掺杂源极/漏极，覆盖栅极的拉伸应力氮化硅层，N型轻掺杂源极/漏极和N型重掺杂源极/ 排水。