-
公开(公告)号：US10903856B2
公开(公告)日：2021-01-26
申请号：US16540991
申请日：2019-08-14
Inventor： Sung-Ik Park , Heung-Mook Kim , Sun-Hyoung Kwon , Nam-Ho Hur
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 2/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
-
242.发明授权公开(公告)号：US10797830B2
公开(公告)日：2020-10-06
申请号：US16791822
申请日：2020-02-14
Inventor： Nam-Ho Hur , Sun-Hyoung Kwon , Sung-Ik Park , Heung-Mook Kim , Jae-Young Lee
Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels to generate a multiplexed signal, a power normalizer configured to reduce power of the multiplexed signal to power corresponding to the core layer signal, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.
-
公开(公告)号：US10797822B2
公开(公告)日：2020-10-06
申请号：US16401006
申请日：2019-05-01
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 2/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
-
公开(公告)号：US10778817B2
公开(公告)日：2020-09-15
申请号：US16313790
申请日：2017-07-05
Inventor： Bo-Mi Lim , Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to reduce power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing time-interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling start position information and size information for each of Physical Layer Pipes (PLPs). In this case, the Physical Layer Pipes include a core layer physical layer pipe corresponding to the core layer signal and an enhanced layer physical layer pipe corresponding to the enhanced layer signal.
-
公开(公告)号：US10469100B2
公开(公告)日：2019-11-05
申请号：US16208732
申请日：2018-12-04
Inventor： Eun-Hee Hyun , Je-Won Lee , Heung-Mook Kim , Joon-Young Jung , Tae-Kyoon Kim
Abstract: Disclosed herein are a method for transmitting and receiving compressed data and an apparatus therefor. According to the method for transmitting compressed data, a transmission apparatus for transmitting compressed data standardizes the value of an In-phase/Quadrature-phase (IQ) data sample to a preset type that is selected from among a positive number and a negative number, determines the sample type of the IQ data sample, the value of which is standardized to the preset type, based on a sample type determination rule, generates a compressed bit string based on the compression rule pertaining to the determined sample type, generates compressed data, including at least one of a reference bit corresponding to the sample type, the sign bit of the IQ data sample, and the compressed bit string, for each IQ data sample, and transmits the compressed data to a reception apparatus.
-
Patent Agency Ranking
公开(公告)号：US10454536B2
公开(公告)日：2019-10-22
申请号：US15993023
申请日：2018-05-30
Inventor： Sung-Ik Park , Bo-Mi Lim , Sun-Hyoung Kwon , Heung-Mook Kim , Jae-Hyun Seo , Jae-Young Lee , Nam-Ho Hur , Hoi-Yoon Jung , David Gomez-Barquero , Eduardo Garro
IPC: H04L1/02 , H04B7/0413 , H04L25/02 , H04L1/00 , H04L1/06
Abstract: Disclosed herein are a method for transceiving a broadcast signal using a combination of multiple antenna schemes with layered division multiplexing and an apparatus for the method. A method for receiving a broadcast signal includes generating received signals based on signals that are received through multiple receiving antennas, estimating channels between the receiving antennas and transmitting antennas, restoring a core-layer signal corresponding to the received signals, and restoring an enhanced-layer signal based on a cancellation process, wherein the cancellation process corresponds to the core-layer signal and is separately performed for the individual receiving antennas.
-
公开(公告)号：US10447310B2
公开(公告)日：2019-10-15
申请号：US15403394
申请日：2017-01-11
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
-
公开(公告)号：US10439760B2
公开(公告)日：2019-10-08
申请号：US15532065
申请日：2016-03-25
Inventor： Sun-Hyoung Kwon , Jae-Young Lee , Sung-Ik Park , Bo-Mi Lim , Heung-Mook Kim , Jin-Hyuk Song
Abstract: An apparatus and method for broadcast signal frame using a boundary between Physical Layer Pipes (PLPs) of a core layer are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information corresponding to the time interleaver, the time interleaver uses one of time interleaver groups, and a boundary between the time interleaver groups is a boundary between Physical Layer Pipes (PLPs) of a core layer corresponding to the core layer signal.
-
公开(公告)号：US10419031B2
公开(公告)日：2019-09-17
申请号：US15402107
申请日：2017-01-09
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
-
公开(公告)号：US10419029B2
公开(公告)日：2019-09-17
申请号：US15426927
申请日：2017-02-07
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
-
-
-
-
-
-
-
-
-
Search Results
276
records
(took 0.025 seconds)
