公开(公告)号：US11172201B2

公开(公告)日：2021-11-09

申请号：US16222104

申请日：2018-12-17

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/132 ,  H04N19/159 ,  H04N19/182 ,  H04N19/196 ,  H04N19/117 ,  H04N19/105

Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry performs: deriving a plurality of reference samples positioned on a first line, for intra prediction; and generating a prediction image using the plurality of reference samples. The deriving includes interpolating a value on a second line perpendicular to the first line using values of encoded pixels on the second line to generate an interpolated value, and deriving one of the plurality of reference samples by projecting the interpolated value onto the first line.

公开(公告)号：US11166020B2

公开(公告)日：2021-11-02

申请号：US16701761

申请日：2019-12-03

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi Kanoh ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Takashi Hashimoto

IPC: H04N19/117 ,  H04N19/14 ,  H04N19/176 ,  H04N19/196

Abstract: An encoder includes processing circuitry and memory. Using the memory, the processing circuitry: encodes and reconstructs an image to generate a reconstructed image; determines, according to a characteristic of a block in the reconstructed image, an interpolation method for interpolating pixels located outside a referable region including the block; interpolates the pixels located outside the referable region, using the interpolation method determined; and applies a filter to the block using the pixels interpolated.

公开(公告)号：US11146812B2

公开(公告)日：2021-10-12

申请号：US16942583

申请日：2020-07-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/537 ,  H04N19/119 ,  H04N19/176

Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry: splits an image block into a plurality of partitions; generates a motion vector candidate list; obtains a motion vector from the motion vector candidate list; performs inter prediction processing using the motion vector; and encodes the image block using a result of the inter prediction processing. When a partition is a non-rectangular partition, the circuitry generates the motion vector candidate list using at least one motion vector among a plurality of motion vectors for a plurality of spatially neighboring partitions or a plurality of motion vectors for a plurality of temporally neighboring partitions, without using a plurality of motion vectors for a plurality of sub-partitions.

公开(公告)号：US11109053B2

公开(公告)日：2021-08-31

申请号：US16291289

申请日：2019-03-04

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/52 ,  H04N19/44 ,  H04N19/70 ,  H04N19/176

Abstract: An encoder includes circuitry and memory. The circuitry, using the memory: calculates at least one difference value between a plurality of pixels in a first block of a current image; calculates a denominator value used for a second block, using the difference value, the denominator value being used for a plurality of sub-blocks of the first block, the second block being one of the plurality of sub-blocks; determines a shift value, using the denominator value; calculates a first value and a second value, using at least a shift operation with the shift value; determines a prediction sample for the second block, using at least the first value and the second value; and encodes the second block, using at least the prediction sample.

公开(公告)号：US11095919B2

公开(公告)日：2021-08-17

申请号：US16194586

申请日：2018-11-19

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Han Boon Teo ,  Takahiro Nishi ,  Tadamasa Toma ,  Ru Ling Liao ,  Sughosh Pavan Shashidhar ,  Hai Wei Sun

IPC: H04N19/597 ,  H04N19/159 ,  H04N5/00 ,  H04N19/46 ,  H04N19/176 ,  G06T5/00 ,  H04N19/85

Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.

公开(公告)号：US11095888B2

公开(公告)日：2021-08-17

申请号：US16591902

申请日：2019-10-03

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi Kanoh ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/117 ,  H04N19/182 ,  H04N19/176 ,  H04N19/187 ,  H04N19/186

Abstract: An encoder includes processing circuitry and a memory coupled to the processing circuitry. Using the memory, the processing circuitry is configured to: change values of pixels in a first block and a second block to filter a boundary between the first block and the second block. The pixels include type one pixels and type two pixels different from the type one pixels. The first set of filter coefficients applied to the type one pixels in the first block and the second set of filter coefficients applied to the type one pixels in the second block are selected to be asymmetrical with respect to the boundary based on block sizes of the first block and the second block.

公开(公告)号：US11064216B2

公开(公告)日：2021-07-13

申请号：US16794944

申请日：2020-02-19

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Takashi Hashimoto

IPC: H04N19/52 ,  H04N19/124 ,  H04N19/159 ,  H04N19/176

Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in inter prediction processing: derives a first motion vector of a current block to be processed, using a motion vector of a previous block which has been previously processed; derives a second motion vector of the current block by performing motion estimation in the vicinity of the first motion vector; and generates a prediction image of the current block by performing motion compensation using the second motion vector.

公开(公告)号：US11044481B2

公开(公告)日：2021-06-22

申请号：US16697525

申请日：2019-11-27

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Masato Ohkawa ,  Hideo Saitou ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/159 ,  H04N19/176 ,  H04N19/61 ,  H04N19/625

Abstract: An encoder which encodes a current block of a picture includes a processor and memory. Using the memory, the processor: determines whether intra prediction is to be used for the current block; and when it is determined that intra prediction is to be used for the current block, generates first transform coefficients by performing first transform of residual signals of the current block using a first transform basis; quantizes the first transform coefficients when an intra prediction mode for the current block is a determined mode and the first transform basis is different from a determined transform basis; and generates second transform coefficients by performing second transform of the first transform coefficients using a second transform basis, and quantizes the second transform coefficients, when the intra prediction mode for the current block is not the determined mode or when the first transform basis matches the determined transform basis.

公开(公告)号：US11012706B2

公开(公告)日：2021-05-18

申请号：US16797993

申请日：2020-02-21

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Sughosh Pavan Shashidhar ,  Ru Ling Liao ,  Hai Wei Sun ,  Han Boon Teo ,  Kiyofumi Abe ,  Tadamasa Toma ,  Takahiro Nishi

IPC: H04N19/00 ,  H04N19/513 ,  H04N19/119 ,  H04N19/176 ,  H04N19/96

Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: selects a first table to be used for a current partition to be encoded in an image of a video, from among tables that are used to correct a base motion vector in a predetermined direction using a correction value specified by an index, the tables including correction values having varying differences between indexes; writes a parameter indicating a first index to be selected from among indexes included in the first table; and encodes the current partition using the base motion vector corrected using a correction value specified by the first index.

公开(公告)号：US11012703B2

公开(公告)日：2021-05-18

申请号：US16436045

申请日：2019-06-10

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe

IPC: H04N19/176 ,  H04N19/51

Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry: in an inter prediction mode in which an affine motion vector is calculated for each of sub-blocks constituting a current block of a picture in the video, based on motion vectors of neighboring blocks of the current block, changes a shape or size of the sub-block according to a variation in direction or variation in magnitude among the motion vectors of the neighboring blocks; calculates the affine motion vector for the sub-block having the shape or size changed; and performs the motion compensation for the sub-block having the shape or size changed.