公开(公告)号：US20100054013A1

公开(公告)日：2010-03-04

申请号：US12619607

申请日：2009-11-16

Applicant: Sachin Joshi ,  Mark Birman ,  Maheshwaran Srinivasan ,  Sandeep Khanna ,  Varadarajan Srinivasan

Inventor： Sachin Joshi ,  Mark Birman ,  Maheshwaran Srinivasan ,  Sandeep Khanna ,  Varadarajan Srinivasan

IPC: G11C15/00 ,  G11C8/00

CPC classification number: G11C15/00 ,  G11C15/04 ,  G11C15/046

Abstract: A content addressable memory (CAM) device includes a plurality of CAM rows, a number of sequencing logic circuits, and a programmable interconnect structure. Each CAM row includes a number of CAM cells to generate a match signal on a match line and includes an enable input. Each sequencing logic circuit includes an input and an output, and is configured to count sequences of match signals from the CAM rows. The programmable interconnect structure selectively connects the match line of any CAM row to the input of any sequencing logic circuit, and selectively connects the output of any sequencing logic circuit to the enable input of any CAM row.

Abstract translation: 内容可寻址存储器（CAM）设备包括多个CAM行，多个排序逻辑电路和可编程互连结构。 每个CAM行包括多个CAM单元，以在匹配线上生成匹配信号并且包括使能输入。 每个排序逻辑电路包括输入和输出，并且被配置为对来自CAM行的匹配信号的序列进行计数。 可编程互连结构选择性地将任何CAM行的匹配线连接到任何排序逻辑电路的输入，并且将任何排序逻辑电路的输出选择性地连接到任何CAM行的使能输入。

公开(公告)号：US20100054012A1

公开(公告)日：2010-03-04

申请号：US12617369

申请日：2009-11-12

Applicant: Maheshwaran Srinivasan ,  Varadarajan Srinivasan ,  Sandeep Khanna ,  Sachin Joshi ,  Mark Birman

Inventor： Maheshwaran Srinivasan ,  Varadarajan Srinivasan ,  Sandeep Khanna ,  Sachin Joshi ,  Mark Birman

IPC: G11C15/00 ,  G11C7/00 ,  G11C5/14

CPC classification number: G11C15/00 ,  G11C15/04 ,  G11C15/046

Abstract: A content addressable memory (CAM) device includes a CAM array, a programmable interconnect structure, and a priority encoder. The CAM array includes a plurality of CAM rows, each row including a number of CAM cells for storing a data word and coupled to a match line that indicates a match result for the CAM row. The programmable interconnect structure is coupled to each CAM row and a plurality of CAM rows, each row including a number of CAM cells for storing a data word and coupled to a match line that indicates match results for the row. The programmable interconnect structure coupled to each CAM row, and is configured to logically connect any number N of selected CAM rows together to form a data word chain spanning N rows, regardless of whether the selected CAM rows are contiguous.

Abstract translation: 内容可寻址存储器（CAM）装置包括CAM阵列，可编程互连结构和优先编码器。 CAM阵列包括多个CAM行，每行包括用于存储数据字并耦合到指示CAM行的匹配结果的匹配线的多个CAM单元。 可编程互连结构耦合到每个CAM行和多个CAM行，每行包括用于存储数据字并耦合到指示行的匹配结果的匹配线的多个CAM单元。 可编程互连结构耦合到每个CAM行，并且被配置为将任何数目N个所选择的CAM行逻辑地连接在一起，以形成横跨N行的数据字链，而不管所选择的CAM行是否是连续的。