Abstract:
A driving device outputting a plurality of sequentially asserted driving signals is provided, including a shift register, a buffer unit, and switch circuits. The shift register includes shift registering units coupled in series. The shift registering units respectively generate shift registering signals which are sequentially asserted. The buffer unit receives at least one input signal. The input signal is periodically asserted, and the buffer unit outputs the input signal. The switch circuits are coupled to the shift registering units to receive the shift registering signals, respectively. All of the switch circuits are coupled to the buffer unit to receive the input signal, and the switch circuits sequentially output the input signal to serve as the driving signals according to the assertion of the shift registering signals.
Abstract:
A pixel driving circuit comprises a storage capacitor, a transistor, a transfer circuit, a driving element, and a switch circuit. The storage capacitor comprises first and second nodes. The transistor has a gate coupled to a discharge signal and is coupled between the first and second nodes. The discharge signal turns on the transistor in first and second discharge periods to discharge the storage capacitor. The transfer circuit outputs a data signal or a reference signal to the first node of the storage capacitor. The switch circuit is coupled to the driving element, a first display element and a second display element. The switch circuit can make the driving element diode-connected in first and second data load periods, and allow a driving current through a first display element in a first light-emitting period and a second display element in a second light-emitting period.
Abstract:
An electronic system including a shift register is disclosed. The shift register includes a first transistor, a first trigger circuit, a second transistor, and a second trigger circuit. The first transistor receives a first input signal. The first trigger circuit is serially connected to the first transistor between a first level and a second level and is connected with the first transistor in a first node. The second transistor receives a second input signal inverted to the first input signal. The second trigger circuit receives the level of the first node, is serially connected to the second transistor between a third level and the second level, and is connected with the second transistor in a second node.
Abstract:
An image display system comprises a pixel driving circuit. A storage capacitor is coupled between the first and second nodes. The first switch is turned on in the first and second periods. The second switch, coupled to the first node, is turned on in the first and second periods. The third switch, coupled between the second node and the first switch, is turned on in the first, third and fourth periods. The fourth switch, coupled between the second switch and the first voltage, is turned on in the first, third and fourth periods. The fifth switch, coupled between the second node and the first voltage, is turned on in the first, second and third periods. The sixth switch, coupled between the first node and the reference voltage, is turned on in the fourth period. The first transistor is coupled between the first and second switches and is turned on in the fourth period. During the second period, the voltage between source and gate of the first transistor is a threshold voltage. The electroluminescent element emits light in the fourth period.
Abstract:
A pixel driving circuit with threshold voltage and power supply voltage compensation. The pixel circuit includes a storage capacitor, a transistor, a transfer circuit, a driving element, and a switching circuit. The transistor has a gate coupled to a discharge signal and is coupled between a first node and a second node. The discharge signal directs the transistor to turn on and then discharges the storage capacitor in a first period. The transfer circuit transfers a data signal or a reference signal to a first node of the storage capacitor. The driving element has a first terminal coupled to a first voltage, a second terminal coupled to a second node of the storage capacitor and a third terminal outputting a driving current. The switching circuit is coupled between the driving element and a display element. The switching circuit can be controlled to diode-connect the driving element in a second period, allowing the driving current to be output to the display element in a third time period.
Abstract:
A display panel includes a gate line circuit. The gate line circuit includes a gate driver, a control circuit and a gate line. The gate driver generates a first driving signal with alternate high and low levels. The first driving signal has a first rising edge and a first falling edge. The control circuit receives the first driving signal and generates a second driving signal. The second driving signal has a second rising edge and a second falling edge. The second rising edge and the second falling edge are respectively smoother than the first rising edge and the first falling edge. The control circuit includes at least one capacitor. The capacitor is charged in a first direction in response to the first rising edge of the first driving signal. The capacitor is charged in a second direction in response to the first falling edge of the first driving signal.
Abstract:
A display system is disclosed in the present invention, which includes a low drop-out voltage regulator (LDO) for receiving an input voltage and providing a stable output voltage. The low drop-out voltage regulator includes a regulating circuit, a first switch, a current source circuit and an inverting circuit. The regulating circuit has a regulating circuit input, a regulating circuit output and a regulating circuit control terminal. The first switch selectively forms short or open circuit in accordance with ON/OFF states thereof. The current source circuit provides a fixed current to the control terminal and the output of the regulating circuit. The inverting circuit has an inverting circuit input coupled to the regulating circuit output and an inverting circuit output terminal coupled to the regulating circuit control terminal, the inverting circuit inverting the output voltage from the regulating circuit output. The regulating circuit control terminal adjusts the output voltage in accordance with a control voltage received thereof.
Abstract:
A buffer circuit has a first transistor and a second transistor in a cascode, and a buffer switch coupled from an output of the buffer to a gate of the second transistor. The buffer circuit is bootstrapped by a bootstrap capacitor, a diode circuit, and a bootstrap switch. The bootstrap capacitor is coupled from the output to the gate of the second transistor through the bootstrap switch. A potential difference is set up across the bootstrap capacitor through the diode circuit. When a low input is given to the buffer circuit, the second transistor turns off and the output goes to a high bias voltage through the first transistor. When a high input is given, the first transistor turns off, the second transistor turns on, and as the output goes low, the gate of the second transistor is bootstrapped to drop the output completely down to a low bias voltage.
Abstract:
The present invention relates to an operational amplifier comprising an input-stage circuit, a floating current mirror circuit, and an output-stage circuit. The input-stage circuit receives an input signal and produces a control signal. The floating current mirror circuit is coupled to the input-stage circuit, and produces a mirror current according to the control signal. The output-stage circuit is coupled to the floating current mirror circuit, and produces a driving signal according to the mirror current. When the operational amplifier is operating in the static mode, the output-stage circuit further produces a static current according to the mirror current. Thereby, by using the floating current mirror circuit, the purpose of low power consumption can be achieved while driving to the high-voltage mode or to the low-voltage mode.
Abstract:
The present relates to a start-up circuit, which is used for starting up a variable power supply circuit, which comprises a detection circuit and a transition circuit. The detection circuit is used for detecting an output voltage of the variable power supply and producing a detection signal. The transition circuit is coupled to the detection circuit. It transits the level of the detection signal and produces a control signal for starting up or cutting off the variable power supply. Thereby, the problem of incapability in transition can be avoided as well as achieving the purpose of low power consumption.