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公开(公告)号：US12198595B2
公开(公告)日：2025-01-14
申请号：US17768540
申请日：2021-12-16
Applicant: Huizhou China Star Optoelectronics Display Co., Ltd. , Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
Inventor： Xiaobing Lu , Xiaolong Chen
IPC: G09G3/20
Abstract: A driving method for a display and a display are provided. The driving method includes: obtaining a first gray scale extremum of a target image frame according to display data of the target image frame; adjusting a first power voltage according to the first gray scale extremum, to obtain a second power voltage; and driving, according to the second power voltage and the display data of the target image frame, the display for displaying. By means of the present disclosure, the second power voltage can be dynamically adjusted, thereby ensuring the display effect and reducing the energy consumption of the display panel.
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公开(公告)号：US20250017096A1
公开(公告)日：2025-01-09
申请号：US17620295
申请日：2021-12-09
Applicant: Huizhou China Star Optoelectronics Display Co., Ltd. , Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
Inventor： Min Wang
IPC: H10K77/10 , H10K59/122 , H10K59/40 , H10K59/80 , H10K102/00
Abstract: A display panel and a display device are disclosed. The display panel includes a substrate, a first flexible layer, a thin-film transistor (TFT) structural layer, a light-emitting functional layer, an opening, and a first inorganic layer. The opening penetrates the first flexible layer, the TFT structural layer, and the light-emitting functional layer. The first inorganic layer is disposed on a surface of the light-emitting functional layer away from the TFT structural layer and at least covers a lateral wall of the opening.
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公开(公告)号：US12193314B2
公开(公告)日：2025-01-07
申请号：US17600075
申请日：2021-08-30
Inventor： Jinyang Zhao , Lixuan Chen , Zhiqing Shi
IPC: H10K71/00 , H10K50/115 , H10K59/12
Abstract: A fabrication method of a display panel and a drying device are provided by the present application. In the display panel of the present application, an electrical field for drying on a pixel electrode layer is used to fix charged groups in a solution of a light-emitting functional layer, which prevents a solvent from driving the movement of the charged groups when the solvent is volatilized, thereby obtaining a light-emitting functional layer with a uniform film thickness. Moreover, the use of the electric field for drying fixes the charged groups so that a drying treatment is performed without strict pumping control during the solvent volatilization process.
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24.发明授权公开(公告)号：US12193309B2
公开(公告)日：2025-01-07
申请号：US17623188
申请日：2021-12-21
Inventor： Weiran Cao , Jinchuan Li , Ying Liu , Wendong Lian
Abstract: An OLED display panel and an electronic device are disclosed. The OLED display panel comprises a main display part and a first organic packaging layer, and the main display part has a display area and a non-display area disposed around the display area; and the first organic packaging layer is disposed on the main display part, wherein the first organic packaging layer comprises a first organic packaging section, the first organic packaging section is located in the non-display area, and the first organic packaging section comprises water absorbent.
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公开(公告)号：US12193270B2
公开(公告)日：2025-01-07
申请号：US17623604
申请日：2021-12-17
Inventor： Weiran Cao , Gaobo Lin , Yuanjun Hsu
IPC: H01L27/14 , H10K59/121 , H10K59/124
Abstract: A flexible display panel and a flexible array substrate are provided. The flexible display panel includes a flexible base and a thin film transistor. The thin film transistor includes an active layer, and the active layer is arranged on the flexible base. Open pores are formed in the active layer. The open pores penetrate through at least one part of the active layer.
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Patent Agency Ranking
公开(公告)号：US12190841B2
公开(公告)日：2025-01-07
申请号：US17762178
申请日：2022-02-24
Inventor： Ruifa Tan , Tianhong Wang , Xiaohui Yao
IPC: G09G3/36 , G02F1/13 , G02F1/1343 , G02F1/1362 , H01L27/12
Abstract: A pixel structure and a display panel are provided. The pixel structure includes a first pixel electrode, a first longitudinal signal line, and a second longitudinal signal line. The first pixel electrode includes a first main pixel area and a first sub-pixel area. The first longitudinal signal line includes a first main line and a first secondary-line. The second longitudinal signal line includes a second main line and a second secondary-line. The first main line and the second main line are arranged in the first main pixel area, and the first secondary-line and the second secondary-line are arranged in the first sub-pixel area.
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公开(公告)号：US12190772B1
公开(公告)日：2025-01-07
申请号：US18523120
申请日：2023-11-29
Inventor： Donghun Lim , Yunpeng Lin , Yingchun Zhao
IPC: G09G3/20
Abstract: A gate driving circuit including cascaded gate driving units is provided. A gate driving unit includes a pull-up control module, a pull-up module electrically connected to the pull-up control module through a first node, a pull-down maintaining module electrically connected to the first node and a voltage line, and a voltage control module. An input terminal of the pull-up module loads a clock signal, and an output terminal is electrically connected to a gate line. The pull-down maintaining module is electrically connected to the pull-up module through the first node and includes an inverter module. The voltage control module is electrically connected to an output terminal of the inverter module to control a first transition edge of a signal at the output terminal of the inverter module to lag behind a second transition edge of the clock signal within a duration of a corresponding clock pulse of the clock signal.
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公开(公告)号：US20250006845A1
公开(公告)日：2025-01-02
申请号：US18395410
申请日：2023-12-22
Inventor： Jincheng TAN
IPC: H01L29/786 , H01L29/423 , H01L29/45 , H01L29/66
Abstract: Disclosed are a thin film transistor, a method of manufacturing the same, and an array substrate. The thin film transistor includes a substrate, a gate, a gate insulating layer, an active layer, an ohmic contact layer, and a source-drain electrode layer, the gate insulating layer includes at least a first gate insulating layer deposited at a low rate, a second gate insulating layer deposited at a high rate, and a third gate insulating layer deposited at a low rate, the first gate insulating layer is in contact with the gate, the third gate insulating layer is in contact with the active layer, and the first gate insulating layer and the third gate insulating layer have a density greater than a density of the second gate insulating layer.
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公开(公告)号：US12174497B2
公开(公告)日：2024-12-24
申请号：US17637086
申请日：2022-01-25
Inventor： Mingming Li , Baixiang Han
IPC: G02F1/1345
Abstract: A display panel and a display device are provided. The display panel has a first area, a second area, and a third area arranged in sequence. The display panel includes a substrate, a plurality of first wirings, and a plurality of second wirings. The first wirings extend from the first area to the second area. The second wirings extend from the second area to the third area. The first wirings and the second wirings are arranged in different layers. The first wirings and the second wirings are connected in a one-to-one correspondence through via holes. The via holes are staggered in the second area.
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公开(公告)号：US20240420659A1
公开(公告)日：2024-12-19
申请号：US17769734
申请日：2022-03-25
Inventor： Fangyun LIU
Abstract: Embodiments of the present disclosure are directed to a display driving circuit, a display driving device, and a display driving method. The display driving circuit comprises a power management chip, a level shifter, and a detection circuit. The power management chip is electrically connected with the level shifter and the detection circuit. The power management chip is configured to send first configuration information, generate second configuration information according to a detection voltage, and send the second configuration information. The level shifter is configured to output multiple clock signals according to the first configuration information or the second configuration information. The detection circuit is configured to generate the detection voltage according to an output voltage of the power management chip and a preset threshold and send the detection voltage to the power management chip.
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