公开(公告)号：US20230088780A1

公开(公告)日：2023-03-23

申请号：US17999167

申请日：2021-05-20

Applicant: Arm Limited

Inventor： Michael John WILLIAMS ,  Alasdair GRANT ,  John Michael HORLEY

IPC: G06F9/34 ,  G06F9/26 ,  G06F9/38

Abstract: Processing circuitry performs data processing operations in response to instructions fetched from a cache or memory or micro-operations decoded from the instructions. Sampling circuitry selects a subset of instructions or micro-operations as sampled operations to be profiled. Profiling circuitry captures, in response to processing of an instruction or micro-operation selected as a sampled operation, a sample record specifying an operation type of the sampled operation and information about behaviour of the sampled operation which is directly attributed to the sampled operation. The profiling circuitry can include, in the sample record for a sampled operation corresponding to a given instruction, a reference instruction address indicator indicative of an address of a reference instruction appearing earlier or later in program order than the given instruction, for which control flow is sequential between any instructions occurring between the reference instruction and the given instruction in program order.

公开(公告)号：US20210034503A1

公开(公告)日：2021-02-04

申请号：US16971415

申请日：2019-01-17

Applicant: Arm Limited

Inventor： Michael John WILLIAMS ,  Graeme Peter BARNES ,  John Michael HORLEY

IPC: G06F11/36

Abstract: A technique is provided for accessing metadata when debugging a program to be executed on processing circuitry. The processing circuitry operates on data formed of data granules having associated metadata items. A method of operating a debugger is provided that comprises controlling the performance of metadata access operations when the debugger decides to access a specified number of metadata items. In particular, the specified number is such that the metadata access operation needs to be performed by the processing circuitry multiple times in order to access the specified number of metadata items. Upon deciding to access a specified number of metadata items, the debugger issues at least one command to cause the processing circuitry to perform a plurality of instances of the metadata access operation in order to access at least a subset of the specified number of metadata items. The number of metadata items accessed by each instance of the metadata access operation is non-deterministic by the debugger from the metadata access operation. However, the at least one command is such that the plurality of instances of the metadata access operation are performed by the processing circuitry without the debugger interrogating the processing circuitry between each instance of the metadata access operation to determine progress in the number of metadata items accessed. Such an approach can significantly improve the efficiency of performing such accesses to metadata items under debugger control.

公开(公告)号：US20190303265A1

公开(公告)日：2019-10-03

申请号：US16063802

申请日：2015-12-22

Applicant: ARM LIMITED

Inventor： Damien Robin MARTIN ,  Clément Marc DEMONGEOT ,  Michael John WILLIAMS

IPC: G06F11/36 ,  G06F9/38 ,  G06F9/30 ,  G06F9/52

Abstract: A method, apparatus and system are provided for diagnosing a processor executing a stream of instructions by causing the processor to execute the stream of instructions in a sequence of stages with a diagnostic exception being taken between each stage. The method involves controlling the processor in a current stage, when a point is reached where the diagnostic exception is to be taken, to store in a storage location type indicator information comprising a type indicator for a current instruction in the stream and a type indicator for a next instruction in the stream. The diagnostic exception is then taken, causing a diagnostic operation to be performed which includes accessing the type indicator information from the storage location and, dependent on the type indicator for the current instruction and the type indicator for the next instruction, determining control information to identify at least one trigger condition for a next diagnostic exception. Thereafter, return from the diagnostic exception causes the processor to operate in a next stage in accordance with the determined control information. By capturing information not only about the current instruction being processed at the point that the diagnostic exception is to be taken, but also information about the next instruction, this can provide a significant improvement in the efficiency of the handling of the diagnostic process.

公开(公告)号：US20190087298A1

公开(公告)日：2019-03-21

申请号：US15711028

申请日：2017-09-21

Applicant: ARM LIMITED

Inventor： Anitha KONA ,  Michael John WILLIAMS ,  John Michael HORLEY ,  Alasdair GRANT

IPC: G06F11/34

Abstract: A data processing apparatus is provided that includes monitor circuitry to produce local trace data indicating behaviour of the data processing apparatus. Interface circuitry communicates with a second data processing apparatus and encoding circuitry produces an encoded instruction to cause the local trace data to be stored in storage circuitry of the second data processing apparatus or to be output at output circuitry of the second data processing apparatus. The interface circuitry transmits the encoded instruction to the second data processing apparatus.

公开(公告)号：US20160070630A1

公开(公告)日：2016-03-10

申请号：US14824299

申请日：2015-08-12

Applicant: ARM LIMITED

Inventor： Michael John WILLIAMS ,  Simon John CRASKE

IPC: G06F11/26 ,  G06F11/22

CPC classification number: G06F11/26 ,  G06F9/30189 ,  G06F11/2236 ,  G06F11/3648

Abstract: A data processing apparatus has a debug state in which processing circuitry 105 executes instructions received from the debug interface 115. Control changing circuitry 135 prohibits the execution of instructions in a predefined privilege mode when in the debug state if a control parameter has a predefined value. In response to a first exception being signalled while in the debug state, where the first exception is intended to be handled at the predefined privilege mode, and further in response to the control parameter having the predefined value, signalling circuitry 115 signals a second exception to be handled at a different privilege mode from the predefined privilege mode and sets information identifying a type of the first exception. Consequently, without having to enter the prohibited (predefined) privilege mode, the debugger 110 can be made aware of the first exception that would ordinarily be handled at the predefined, i.e. prohibited privilege mode.

Abstract translation: 数据处理装置具有调试状态，其中处理电路105执行从调试接口115接收到的指令。控制改变电路135在控制参数具有预定值时处于调试状态时禁止执行预定义特权模式中的指令。 响应于在处于调试状态时发信号通知的第一异常，其中第一异常旨在以预定义的权限模式被处理，并且还响应于具有预定值的控制参数，信令电路115向第二异常发出第二异常 在与预定义的权限模式不同的特权模式下处理，并设置标识第一个异常类型的信息。 因此，无需进入禁止（预定义）特权模式，调试器110可以被认识到通常在预定义的即禁止的特权模式下处理的第一个异常。