公开(公告)号：US11961479B2

公开(公告)日：2024-04-16

申请号：US17610581

申请日：2020-12-22

Applicant: Beijing BOE Optoelectronics Technology Co., Ltd. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Tiankuo Shi ,  Wei Sun ,  Yifan Hou ,  Zhihua Ji ,  Xiaomang Zhang ,  Rui Liu ,  Jigang Sun ,  Yuxin Bi ,  Xue Dong

IPC: G09G3/3266 ,  G09G3/20 ,  G09G3/3275

CPC classification number: G09G3/3266 ,  G09G3/2096 ,  G09G3/3275 ,  G09G2300/0443 ,  G09G2300/0452 ,  G09G2320/0233 ,  G09G2330/021 ,  G09G2354/00

Abstract: A display device and a method for driving the display device are described, where the display device includes a plurality of pixel island groups, a plurality of lenses, a positioning module, and a gate driving chip. The plurality of pixel island groups are arranged in array, wherein each of the pixel island groups includes a plurality of pixel islands, and different pixel islands are able to be scanned in different scanning modes. The positioning module is configured to determine a gaze area and a non-gaze area according to gazed coordinates of human eye. The gate driving chip is configured to provide gate driving signals in a first driving manner to sub-pixel units in the gaze area, and provide gate driving signals simultaneously in a second driving manner to sub-pixel units in the non-gaze area during a scanning stage of the sub-pixel units in the non-gaze area.

公开(公告)号：US11778446B2

公开(公告)日：2023-10-03

申请号：US17444826

申请日：2021-08-10

Applicant: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shaolei Zong ,  Wei Sun ,  Jieqiong Wang ,  Jigang Sun

IPC: H04W4/90 ,  G08B6/00 ,  H04M1/02 ,  G06F3/041 ,  G06F3/044

CPC classification number: H04W4/90 ,  G08B6/00 ,  H04M1/0202 ,  G06F3/041 ,  G06F3/044 ,  G09G2310/0267 ,  H04M2250/12

Abstract: A gate driving unit includes an input terminal, a latch node control circuit, a first node potential maintenance circuit, and a latch node reset circuit, the latch node control circuit is configured to control a voltage of the latch node through a charging voltage inputted by the latch charging terminal under the control of an input signal provided by the input terminal, the first node potential maintenance circuit is configured to control the connection between the first node and the latch enable terminal under the control of a voltage of the latch node, to maintain a potential of the first node; and the latch node reset circuit is configured to control to reset the potential of the latch node under the control of the latch node reset signal inputted by the latch node reset terminal.

公开(公告)号：US11460950B2

公开(公告)日：2022-10-04

申请号：US16767128

申请日：2019-12-25

Applicant: Ordos Yuansheng Optoelectronics Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Jing Zhao ,  Jigang Sun ,  Shuang Zhao

IPC: G06F3/041 ,  G02F1/1333

Abstract: A display panel includes a touch display region and a border region, wherein multiple touch drive lines and multiple multi-path selection units are disposed within the touch display region, each of the multi-path selection units is electrically connected with at least part of the multiple touch drive lines, the border region includes a wiring region, and input signal lines of the multi-path selection units are arranged within the wiring region.

公开(公告)号：US11226700B2

公开(公告)日：2022-01-18

申请号：US16633231

申请日：2019-02-20

Applicant: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lei Wang ,  Jigang Sun

IPC: G06F3/041 ,  G09G3/20 ,  G11C19/28 ,  G06F3/044 ,  G09G3/3208 ,  G09G3/36

Abstract: A shift register circuit, a driving circuit, a display device and a driving method. The shift register circuit including P shift registers that are cascaded and a bypass output circuit, wherein each of the P shift registers includes a first scan output terminal, the first scan output terminal is configured to output a first scan signal, the bypass output circuit includes Q control terminals and a second scan output, the Q control terminals of the bypass output circuit are configured to receive the first scan signal, and the bypass output circuit is configured to output a second scan signal under control of the first scan signal received by the Q control terminals respectively, P is an integer greater than or equal to 2, and Q is an integer less than or equal to P.

公开(公告)号：US10884443B2

公开(公告)日：2021-01-05

申请号：US16176369

申请日：2018-10-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.

Inventor： Jing Zhao ,  Jigang Sun ,  Shuang Zhao ,  Wei Sun

IPC: G06F3/043 ,  G05F1/59 ,  G06F3/041 ,  G05F1/46 ,  G06F3/044

Abstract: The present application provides a voltage control circuit and method, a panel and a display apparatus. The voltage control circuit includes: a comparison circuit configured to compare a first voltage with a second voltage, output a first signal in a case where a difference between the first voltage and the second voltage exceeds a thresholds range, and output a second signal in a case where the difference between the first voltage and the second voltage is within the thresholds range; a compensation circuit coupled to the comparison circuit, and configured to compensate the first voltage in response to the first signal output by the comparison circuit; and a latch circuit coupled to the comparison circuit and the compensation circuit, and configured to latch the first voltage in response to the second signal output by the comparison circuit.