公开(公告)号：US5610421A

公开(公告)日：1997-03-11

申请号：US358152

申请日：1994-12-15

申请人： Claudio Contiero ,  Tiziana Cavioni ,  Stefano Manzini

发明人： Claudio Contiero ,  Tiziana Cavioni ,  Stefano Manzini

IPC分类号： H01L21/8247 ,  H01L27/06 ,  H01L27/092 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/105 ,  H01L27/0623 ,  H01L27/0922

摘要： An integrated circuit structure is disclosed wherein an EPROM cell has an active area formed by the same operations as are carried out to form a P region intended to contain an N-channel MOS transistor, source and drain regions formed by the same operations as are carried out to form the source and drain regions of said transistor, a control electrode consisting of an N+ region formed by the same operations as are carried out to form deep regions intended to contact buried N+ regions, and a floating gate electrode consisting of a layer of conductive material formed by the same operations as are carried out to form the gate electrodes of the MOS transistors in the integrated circuit.The EPROM cell can, therefore, be formed in a mixed integrated circuit with no need for purposely added processing steps.

摘要翻译： 公开了一种集成电路结构，其中EPROM单元具有通过与用于形成用于包含N沟道MOS晶体管的P区域相同的操作而形成的有源区域，源极和漏极区域通过与所携带的相同的操作形成 以形成所述晶体管的源极和漏极区域，由与进行相同操作形成的N +区域组成的控制电极以形成用于接触掩埋的N +区域的深区域，以及浮栅电极，其由 导电材料通过与集成电路中的MOS晶体管的栅电极相同的操作形成。 因此，可以在混合集成电路中形成EPROM单元，而不需要有意添加的处理步骤。