公开(公告)号：US08547366B2

公开(公告)日：2013-10-01

申请号：US12785681

申请日：2010-05-24

Applicant: Ping-Lin Liu ,  Tse-Yuan Chen

Inventor： Ping-Lin Liu ,  Tse-Yuan Chen

IPC: G09G5/00

CPC classification number: G09G3/20 ,  G09G2310/0286 ,  G11C19/184 ,  G11C19/28

Abstract: A driving device outputting a plurality of sequentially asserted driving signals is provided, including a shift register, a buffer unit, and switch circuits. The shift register includes shift registering units coupled in series. The shift registering units respectively generate shift registering signals which are sequentially asserted. The buffer unit receives at least one input signal. The input signal is periodically asserted, and the buffer unit outputs the input signal. The switch circuits are coupled to the shift registering units to receive the shift registering signals, respectively. All of the switch circuits are coupled to the buffer unit to receive the input signal, and the switch circuits sequentially output the input signal to serve as the driving signals according to the assertion of the shift registering signals.

Abstract translation: 提供输出多个顺序断言的驱动信号的驱动装置，包括移位寄存器，缓冲单元和开关电路。 移位寄存器包括串联耦合的移位寄存单元。 移位登记单元分别产生顺序地被确认的移位登记信号。 缓冲单元接收至少一个输入信号。 周期性地输入输入信号，缓冲单元输出输入信号。 开关电路被耦合到移位寄存单元以分别接收移位寄存信号。 所有开关电路都耦合到缓冲单元以接收输入信号，并且开关电路根据移位寄存信号的断言顺序输出输入信号作为驱动信号。

公开(公告)号：US20110135050A1

公开(公告)日：2011-06-09

申请号：US12955686

申请日：2010-11-29

Applicant: Ping-Lin Liu

Inventor： Ping-Lin Liu

IPC: G11C19/28

CPC classification number: G11C19/28

Abstract: An electronic system including a shift register is disclosed. The shift register includes a first transistor, a first trigger circuit, a second transistor, and a second trigger circuit. The first transistor receives a first input signal. The first trigger circuit is serially connected to the first transistor between a first level and a second level and is connected with the first transistor in a first node. The second transistor receives a second input signal inverted to the first input signal. The second trigger circuit receives the level of the first node, is serially connected to the second transistor between a third level and the second level, and is connected with the second transistor in a second node.

Abstract translation: 公开了一种包括移位寄存器的电子系统。 移位寄存器包括第一晶体管，第一触发电路，第二晶体管和第二触发电路。 第一晶体管接收第一输入信号。 第一触发电路在第一电平和第二电平之间串联连接到第一晶体管，并且在第一节点中与第一晶体管连接。 第二晶体管接收与第一输入信号反相的第二输入信号。 第二触发电路接收第一节点的电平，在第三电平和第二电平之间串联连接到第二晶体管，并在第二节点与第二晶体管连接。

公开(公告)号：US07876293B2

公开(公告)日：2011-01-25

申请号：US11894191

申请日：2007-08-20

Applicant: Ping-Lin Liu

Inventor： Ping-Lin Liu

IPC: G09G3/30

CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/043

Abstract: An image display system comprises a pixel driving circuit. A storage capacitor is coupled between the first and second nodes. The first switch is turned on in the first and second periods. The second switch, coupled to the first node, is turned on in the first and second periods. The third switch, coupled between the second node and the first switch, is turned on in the first, third and fourth periods. The fourth switch, coupled between the second switch and the first voltage, is turned on in the first, third and fourth periods. The fifth switch, coupled between the second node and the first voltage, is turned on in the first, second and third periods. The sixth switch, coupled between the first node and the reference voltage, is turned on in the fourth period. The first transistor is coupled between the first and second switches and is turned on in the fourth period. During the second period, the voltage between source and gate of the first transistor is a threshold voltage. The electroluminescent element emits light in the fourth period.

Abstract translation: 图像显示系统包括像素驱动电路。 存储电容器耦合在第一和第二节点之间。 第一个开关在第一个和第二个周期被打开。 耦合到第一节点的第二开关在第一和第二周期中导通。 耦合在第二节点和第一开关之间的第三开关在第一，第三和第四周期中导通。 耦合在第二开关和第一电压之间的第四开关在第一，第三和第四周期中导通。 耦合在第二节点和第一电压之间的第五开关在第一，第二和第三周期中导通。 耦合在第一节点和参考电压之间的第六开关在第四周期中导通。 第一晶体管耦合在第一和第二开关之间，并且在第四周期中导通。 在第二周期期间，第一晶体管的源极和栅极之间的电压是阈值电压。 电致发光元件在第四周期发光。

公开(公告)号：US20100164943A1

公开(公告)日：2010-07-01

申请号：US12648116

申请日：2009-12-28

Applicant: Ping-Lin Liu

Inventor： Ping-Lin Liu

IPC: G06F3/038 ,  G09G3/30 ,  G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3266 ,  G09G2320/0209 ,  G09G2320/0223

Abstract: A display panel includes a gate line circuit. The gate line circuit includes a gate driver, a control circuit and a gate line. The gate driver generates a first driving signal with alternate high and low levels. The first driving signal has a first rising edge and a first falling edge. The control circuit receives the first driving signal and generates a second driving signal. The second driving signal has a second rising edge and a second falling edge. The second rising edge and the second falling edge are respectively smoother than the first rising edge and the first falling edge. The control circuit includes at least one capacitor. The capacitor is charged in a first direction in response to the first rising edge of the first driving signal. The capacitor is charged in a second direction in response to the first falling edge of the first driving signal.

Abstract translation: 显示面板包括栅极线电路。 栅极线电路包括栅极驱动器，控制电路和栅极线。 栅极驱动器产生具有交替的高电平和低电平的第一驱动信号。 第一驱动信号具有第一上升沿和第一下降沿。 控制电路接收第一驱动信号并产生第二驱动信号。 第二驱动信号具有第二上升沿和第二下降沿。 第二上升沿和第二下降沿分别比第一上升沿和第一下降沿平滑。 控制电路包括至少一个电容器。 响应于第一驱动信号的第一上升沿，电容器沿第一方向充电。 响应于第一驱动信号的第一下降沿，电容器在第二方向充电。

公开(公告)号：US20100026676A1

公开(公告)日：2010-02-04

申请号：US12503388

申请日：2009-07-15

Applicant: Ping-Lin Liu

Inventor： Ping-Lin Liu

IPC: G09G5/00

CPC classification number: G09G3/20 ,  G09G3/3696 ,  G09G2330/028

Abstract: A display system is disclosed in the present invention, which includes a low drop-out voltage regulator (LDO) for receiving an input voltage and providing a stable output voltage. The low drop-out voltage regulator includes a regulating circuit, a first switch, a current source circuit and an inverting circuit. The regulating circuit has a regulating circuit input, a regulating circuit output and a regulating circuit control terminal. The first switch selectively forms short or open circuit in accordance with ON/OFF states thereof. The current source circuit provides a fixed current to the control terminal and the output of the regulating circuit. The inverting circuit has an inverting circuit input coupled to the regulating circuit output and an inverting circuit output terminal coupled to the regulating circuit control terminal, the inverting circuit inverting the output voltage from the regulating circuit output. The regulating circuit control terminal adjusts the output voltage in accordance with a control voltage received thereof.

Abstract translation: 在本发明中公开了一种显示系统，其包括用于接收输入电压并提供稳定输出电压的低压降电压调节器（LDO）。 低压降稳压器包括调节电路，第一开关，电流源电路和反相电路。 调节电路具有调节电路输入，调节电路输出和调节电路控制端。 第一开关根据其ON / OFF状态选择性地形成短路或开路。 电流源电路向控制端和调节电路的输出提供固定电流。 反相电路具有耦合到调节电路输出的反相电路输入和耦合到调节电路控制端的反相电路输出端，反相电路使调节电路输出的输出电压反相。 调节电路控制端子根据其接收到的控制电压来调节输出电压。

公开(公告)号：US07385441B2

公开(公告)日：2008-06-10

申请号：US11535499

申请日：2006-09-27

Applicant: Ping-Lin Liu

Inventor： Ping-Lin Liu

IPC: H03K7/08

CPC classification number: H03K19/01714

Abstract: A buffer circuit has a first transistor and a second transistor in a cascode, and a buffer switch coupled from an output of the buffer to a gate of the second transistor. The buffer circuit is bootstrapped by a bootstrap capacitor, a diode circuit, and a bootstrap switch. The bootstrap capacitor is coupled from the output to the gate of the second transistor through the bootstrap switch. A potential difference is set up across the bootstrap capacitor through the diode circuit. When a low input is given to the buffer circuit, the second transistor turns off and the output goes to a high bias voltage through the first transistor. When a high input is given, the first transistor turns off, the second transistor turns on, and as the output goes low, the gate of the second transistor is bootstrapped to drop the output completely down to a low bias voltage.

Abstract translation: 缓冲电路具有共源共栅中的第一晶体管和第二晶体管，以及从缓冲器的输出端耦合到第二晶体管的栅极的缓冲器开关。 缓冲电路由自举电容器，二极管电路和自举开关自举。 自举电容器通过自举开关从输出端耦合到第二晶体管的栅极。 通过二极管电路在自举电容器之间建立电位差。 当向缓冲器电路提供低输入时，第二晶体管截止，并且输出通过第一晶体管达到高偏置电压。 当给定高输入时，第一晶体管截止，第二晶体管导通，并且随着输出变低，第二晶体管的栅极被自举地将输出完全降低到低偏置电压。

公开(公告)号：US20080048947A1

公开(公告)日：2008-02-28

申请号：US11894191

申请日：2007-08-20

Applicant: Ping-Lin Liu

Inventor： Ping-Lin Liu

IPC: G09G3/30

CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/043

Abstract: An image display system comprises a pixel driving circuit. A storage capacitor is coupled between the first and second nodes. The first switch is turned on in the first and second periods. The second switch, coupled to the first node, is turned on in the first and second periods. The third switch, coupled between the second node and the first switch, is turned on in the first, third and fourth periods. The fourth switch, coupled between the second switch and the first voltage, is turned on in the first, third and fourth periods. The fifth switch, coupled between the second node and the first voltage, is turned on in the first, second and third periods. The sixth switch, coupled between the first node and the reference voltage, is turned on in the fourth period. The first transistor is coupled between the first and second switches and is turned on in the fourth period. During the second period, the voltage between source and gate of the first transistor is a threshold voltage. The electroluminescent element emits light in the fourth period.

Abstract translation: 图像显示系统包括像素驱动电路。 存储电容器耦合在第一和第二节点之间。 第一个开关在第一个和第二个周期被打开。 耦合到第一节点的第二开关在第一和第二周期中导通。 耦合在第二节点和第一开关之间的第三开关在第一，第三和第四周期中导通。 耦合在第二开关和第一电压之间的第四开关在第一，第三和第四周期中导通。 耦合在第二节点和第一电压之间的第五开关在第一，第二和第三周期中导通。 耦合在第一节点和参考电压之间的第六开关在第四周期中导通。 第一晶体管耦合在第一和第二开关之间，并且在第四周期中导通。 在第二周期期间，第一晶体管的源极和栅极之间的电压是阈值电压。 电致发光元件在第四周期发光。