公开(公告)号：US09412706B1

公开(公告)日：2016-08-09

申请号：US14609272

申请日：2015-01-29

Applicant: Micron Technology, Inc.

Inventor： Ahmed H. Abdelnaby ,  Sony Varghese

IPC: H01L21/304 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/562 ,  H01L21/304 ,  H01L21/568 ,  H01L21/6835 ,  H01L2221/68327 ,  H01L2224/80

Abstract: Apparatuses and methods for reducing the warp of semiconductor wafer stacks during manufacturing are disclosed. An engineered carrier wafer is disclosed. The engineered carrier wafer may be pre-stressed such that it exhibits a warp. The warp may be configured to counteract a warp of a device wafer included in the wafer stack. The overall warp of the wafer stack may be reduced.

Abstract translation: 公开了用于在制造期间减少半导体晶片堆叠的翘曲的装置和方法。 公开了一种工程载体晶片。 工程载体晶片可以预应力使其呈现翘曲。 翘曲可以被配置为抵消包括在晶片堆叠中的器件晶片的翘曲。 可以减小晶片堆叠的整体翘曲。