公开(公告)号：US5347542A

公开(公告)日：1994-09-13

申请号：US723288

申请日：1991-06-28

申请人： Christopher N. Kurby ,  Donald R. Beyer ,  Anne P. Davies-Walsh ,  Kevin L. Fluharty ,  Matthew R. Miller

发明人： Christopher N. Kurby ,  Donald R. Beyer ,  Anne P. Davies-Walsh ,  Kevin L. Fluharty ,  Matthew R. Miller

IPC分类号： H04L7/04 ,  H04L27/00 ,  H04L25/49

CPC分类号： H04L27/0008 ,  H04L7/041 ,  H04L7/046

摘要： In a system where 2-level modulation and 4-level modulation of communication signals exist, an apparatus (107) demodulates either modulation scheme by demodulating (301) a received signal under the presumption that it is a 4-level signal, and if the received signal is detected (309) to be a 2-level signal, the signal is then demodulated (319) as a 2-level signal.

摘要翻译： 在存在通信信号的2电平调制和4电平调制的系统中，设备（107）在推定为4电平信号的情况下解调（301）接收信号来解调任一调制方案，并且如果 检测到接收信号（309）为2电平信号，然后将信号解调（319）作为2电平信号。

公开(公告)号：US5760647A

公开(公告)日：1998-06-02

申请号：US657491

申请日：1996-06-04

申请人： Matthew R. Miller ,  Andrew J. Pagones

发明人： Matthew R. Miller ,  Andrew J. Pagones

IPC分类号： H03F3/45 ,  H03F3/16

CPC分类号： H03F3/45179 ,  H03F3/45089 ,  H03F2203/45612 ,  H03F2203/45651

摘要： A wide bandwidth fast settling operational amplifier (71) comprises a first stage (72) and a second stage (73). The first stage attenuates a differential input signal applied to the operational amplifier (71). The second stage (73) provides all the gain of the operational amplifier (71). The first stage is a wide bandwidth stage having a differential input transistor pair (74,75) coupled in a voltage follower configuration. The differential input transistor pair (74,75) are degenerated by resistors (76,77) to reduce voltage gain and to lower an impedance coupled to the second stage (73). The first stage (72) is biased via a current source. The first stage (72) provides a reference voltage to the second stage that corresponds to and varies with an input common mode voltage. The reference voltage is used to bias a cascode stage in the second stage (73) to increase common mode range.

摘要翻译： 宽带宽快速建立运算放大器（71）包括第一级（72）和第二级（73）。 第一级衰减施加到运算放大器（71）的差分输入信号。 第二级（73）提供运算放大器（71）的所有增益。 第一级是具有以电压跟随器配置耦合的差分输入晶体管对（74,75）的宽带宽级。 差分输入晶体管对（74,75）由电阻（76,77）退化以降低电压增益并降低耦合到第二级（73）的阻抗。 第一级（72）经由电流源偏置。 第一级（72）提供对应于输入共模电压并随输入共模电压变化的第二级的参考电压。 参考电压用于偏置第二级（73）中的共源共栅级，以增加共模范围。