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公开(公告)号:US20180293939A1
公开(公告)日:2018-10-11
申请号:US15839455
申请日:2017-12-12
Applicant: Samsung Display Co., Ltd.
Inventor: Yong Jae KIM , Jin JEON , Chul Kyu KANG
IPC: G09G3/3233 , H01L27/32 , H01L51/52
Abstract: An organic light emitting display device driven at a first driving frequency or a second driving frequency lower than the first driving frequency includes pixels coupled to first scan lines, second scan lines, and data lines, a first scan driver configured to supply scan signals to the first scan lines during a first period and a second period in one frame period, when the organic light emitting display device is driven at the second driving frequency, a second scan driver configured to supply scan signals to the second scan lines during the first period, when the organic light emitting display device is driven at the second driving frequency, and a data driver configured to supply a data signal to the data lines during the first period.
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公开(公告)号:US20240224642A1
公开(公告)日:2024-07-04
申请号:US18238529
申请日:2023-08-28
Applicant: Samsung Display Co., Ltd.
Inventor: Seon Kyoon MOK , Sung Chan HWANG , Chul Kyu KANG , Dong Hyun KIM , Su Jin KIM , Seon I JEONG , Chae Han HYUN
IPC: H10K59/131
CPC classification number: H10K59/131
Abstract: The present disclosure relates to a display device. According to an embodiment of the disclosure, a display device including a first pixel which includes a first gate node including a first vertical portion and a first horizontal portion, and a first pixel electrode, and a second pixel which includes a second gate node including a second vertical portion and a second horizontal portion, and a second pixel electrode, wherein at least a part of each of the first horizontal portion and the second horizontal portion is disposed between facing surfaces of the first pixel electrode and the second pixel electrode so as not to overlap the first and second pixel electrodes.
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公开(公告)号:US20230326399A1
公开(公告)日:2023-10-12
申请号:US18170508
申请日:2023-02-16
Applicant: Samsung Display Co., LTD.
Inventor: MINKU LEE , Ji-Hyun KA , Chul Kyu KANG , SEUNGHEE LEE , Hai-Jung IN , HYEONGJUN JIN , Hyun Ji CHA
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2310/0275 , G09G2300/0842
Abstract: An emissive display device includes: a light emitting diode; an n-type driving transistor comprising a first driving gate electrode, a first electrode receiving a driving voltage, a second electrode transferring an output current to the anode, and a second driving gate electrode; a second transistor connected to a data line; a third transistor configured to connect the first electrode and the first driving gate electrode of the driving transistor; a storage capacitor comprising a first storage electrode and a second storage electrode connected to the first driving gate electrode; a ninth transistor transferring an overlapping electrode voltage to the second driving gate electrode; an overlapping electrode voltage line crossing the data line and receiving the overlapping electrode voltage; and a shielding electrode at an intersection of the data line and the overlapping electrode voltage line and between the data line and the overlapping electrode voltage line.
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公开(公告)号:US20230116848A1
公开(公告)日:2023-04-13
申请号:US18075048
申请日:2022-12-05
Applicant: Samsung Display Co., Ltd.
Inventor: Sung Hwan KIM , Chul Kyu KANG , Hyun-Chol BANG , Soo Hee OH , Dong Sun LEE
IPC: G09G3/3291 , G09G3/3266
Abstract: A display device includes: scan, control, and emission control signal lines, signals transmitted thereby being different from one another; data and driving voltage lines; a first transistor including a first gate electrode and first source and drain; a second transistor including a second gate electrode connected to a first scan line, a second source connected to a first data line, and a second drain connected to the first source; a light-emitting element; a control transistor including a control gate electrode connected to a first control line and between the driving voltage line and the first source or the light-emitting element and the first drain; and an emission control transistor in series between the light-emitting element and the control transistor, the control transistor and the first transistor, or the driving voltage line and the control transistor, and an emission control gate electrode connected to the emission control signal line.
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公开(公告)号:US20220199023A1
公开(公告)日:2022-06-23
申请号:US17688838
申请日:2022-03-07
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Yong Jae KIM , Jin JEON , Chul Kyu KANG
IPC: G09G3/3233 , H01L51/52 , H01L27/32 , G09G3/3266
Abstract: An organic light emitting display device driven at a first driving frequency or a second driving frequency lower than the first driving frequency includes pixels coupled to first scan lines, second scan lines, and data lines, a first scan driver configured to supply scan signals to the first scan lines during a first period and a second period in one frame period, when the organic light emitting display device is driven at the second driving frequency, a second scan driver configured to supply scan signals to the second scan lines during the first period, when the organic light emitting display device is driven at the second driving frequency, and a data driver configured to supply a data signal to the data lines during the first period.
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公开(公告)号:US20200168160A1
公开(公告)日:2020-05-28
申请号:US16570476
申请日:2019-09-13
Applicant: Samsung Display Co., Ltd.
Inventor: Soo Hee OH , Chul Kyu KANG , Dong Sun LEE , Sang Moo CHOI
IPC: G09G3/3266 , G09G3/3291 , G06F1/08
Abstract: A stage and a scan driver including the same for supplying a scan signal using a stage formed of P-type transistors to prevent output of an unwanted noise in a period where the scan signal is not supplied.
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公开(公告)号:US20200143747A1
公开(公告)日:2020-05-07
申请号:US16563636
申请日:2019-09-06
Applicant: Samsung Display Co., Ltd.
Inventor: Sung Hwan KIM , Chul Kyu KANG , Soo Hee OH , Dong Sun LEE
IPC: G09G3/3266 , G09G3/3291
Abstract: A pixel circuit, includes: an organic light-emitting diode; a first transistor coupled between a second node and a third node, wherein a gate electrode of the first transistor is coupled to a first node; a second transistor coupled between a data line and the second node, wherein a gate electrode of the second transistor is coupled to a first scan line; a fourth transistor coupled between the first node and an initialization power source, wherein a gate electrode of the fourth transistor is coupled to a second scan line; a fifth transistor coupled between a first power source and the second node, wherein a gate electrode of the fifth transistor is coupled to a first emission line; and a sixth transistor and an eighth transistor coupled in series between the third node and the organic light-emitting diode.
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公开(公告)号:US20190386079A1
公开(公告)日:2019-12-19
申请号:US16220670
申请日:2018-12-14
Applicant: Samsung Display Co., Ltd.
Inventor: Chul Kyu KANG , Won Kyu KWAK , Sang Moo CHOI
IPC: H01L27/32
Abstract: A pixel and a display device having the pixel, the pixel including: a light emitting element; a first transistor configured to control, in response to a voltage of a first node coupled to a gate electrode thereof, current to be supplied from a first power supply coupled with a first electrode thereof to a second power supply via the light emitting element; a storage capacitor coupled between the first node and the first power supply; a second transistor coupled between a data line and the first transistor; an initialization transistor coupled between the light emitting element and an initialization power supply to transmit a voltage of the initialization power supply the light emitting element; and a dummy transistor coupled between the light emitting element and the initialization power supply, and including a first electrode and a second electrode that are coupled with each other.
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公开(公告)号:US20180330673A1
公开(公告)日:2018-11-15
申请号:US15979099
申请日:2018-05-14
Applicant: Samsung Display Co., Ltd.
Inventor: Chul Kyu KANG , Yong Sung PARK , Jin Woo PARK , Dong Sun LEE
IPC: G09G3/3266 , G09G3/3291
CPC classification number: G09G3/3266 , G09G3/3291 , G09G2310/0202
Abstract: A circuit stage including a first transistor including a first electrode and a gate electrode, the first electrode being coupled to a first input terminal and the gate electrode being coupled to a second input terminal configured to receive a first clock signal, an output circuit coupled to the second input terminal and a second power input terminal, an input circuit coupled to a second electrode of the first transistor and to a third input terminal, the third input terminal being configured to receive a first control clock signal, the input circuit being configured to control voltages of the second node and a third node, a first driving circuit coupled to a first power input terminal and to a fourth input terminal configured to receive a second control clock signal, and a second driving circuit coupled to the fourth input terminal and the third node.
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