Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions
    21.
    发明授权
    Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions 有权
    半导体器件包括在至少一对间隔应力区域之间的应变超晶格

    公开(公告)号:US07531828B2

    公开(公告)日:2009-05-12

    申请号:US11457269

    申请日:2006-07-13

    IPC分类号: H01L29/06

    摘要: A semiconductor device may include at least one pair of spaced apart stress regions, and a strained superlattice layer between the at least one pair of spaced apart stress regions and including a plurality of stacked groups of layers. Each group of layers of the strained superlattice layer may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

    摘要翻译: 半导体器件可以包括至少一对间隔开的应力区域和在至少一对间隔应力区域之间的应变超晶格层,并且包括多个堆叠的层组。 应变超晶格层的每组层可以包括限定基极半导体部分的多个层叠的基底半导体单层和限制在相邻的基极半导体部分的晶格内的至少一个非半导体单层。

    Method for making semiconductor device comprising a superlattice with upper portions extending above adjacent upper portions of source and drain regions
    22.
    发明授权
    Method for making semiconductor device comprising a superlattice with upper portions extending above adjacent upper portions of source and drain regions 有权
    一种用于制造半导体器件的方法,该半导体器件包括超晶格,上部部分在源极和漏极区域的相邻上部之上延伸

    公开(公告)号:US07288457B2

    公开(公告)日:2007-10-30

    申请号:US10940594

    申请日:2004-09-14

    申请人: Scott A. Kreps

    发明人: Scott A. Kreps

    IPC分类号: H01L21/336

    摘要: A method for making a semiconductor device may include providing a semiconductor substrate and forming at least one MOSFET by forming spaced apart source and drain regions and a superlattice on the substrate so that the superlattice is between the source and drain regions. The superlattice may include a plurality of stacked groups of layers. The superlattice may have upper portions extending above adjacent upper portions of the source and drain regions, and lower portions contacting the source and drain regions so that a channel is defined in lower portions of the superlattice. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor. The method may further include forming a gate overlying the superlattice.

    摘要翻译: 制造半导体器件的方法可以包括提供半导体衬底并且通过在衬底上形成间隔开的源极和漏极区域和超晶格来形成至少一个MOSFET,使得超晶格位于源极和漏极区域之间。 超晶格可以包括多个堆叠的层组。 超晶格可以具有在源极和漏极区域的相邻上部之上延伸的上部,以及接触源极和漏极区域的下部,使得在超晶格的下部限定沟道。 超晶格的每组层可以包括在其上限定基极半导体部分和能带改性层的多个堆叠的基底半导体单层。 能带修改层可以包括约束在相邻基极半导体的晶格内的至少一个非半导体单层。 该方法还可以包括形成覆盖超晶格的栅极。

    Method for making a semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structure
    23.
    发明授权
    Method for making a semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structure 有权
    制造半导体器件的方法,包括具有3 / 1-5 / 1锗层结构的带状工程超晶格

    公开(公告)号:US07071119B2

    公开(公告)日:2006-07-04

    申请号:US10992422

    申请日:2004-11-18

    IPC分类号: H01L31/109

    摘要: A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

    摘要翻译: 半导体器件包括超晶格,其又包括多个堆叠的层组。 该装置还可以包括用于使载流子相对于堆叠的层组在平行方向上通过超晶格的运送的区域。 每个超晶格组可以包括限定基极半导体部分和其上的能带修饰层的多个层叠的基底半导体单层。 此外,能带修改层可以包括约束在相邻的基底半导体部分的晶格内的至少一个非半导体单层。 因此,超晶格可以在平行方向上具有比否则将存在的更高的载流子迁移率。

    Method for making semiconductor device including band-engineered superlattice
    24.
    发明授权
    Method for making semiconductor device including band-engineered superlattice 有权
    制造半导体器件的方法,包括带状工程超晶格

    公开(公告)号:US07033437B2

    公开(公告)日:2006-04-25

    申请号:US10717370

    申请日:2003-11-19

    IPC分类号: C30B25/02

    摘要: A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.

    摘要翻译: 一种通过形成超晶格来制造半导体器件的方法,该超晶格又包括多个堆叠的层组。 该方法还可以包括形成区域,用于使电荷载体相对于层叠的层组在平行方向上通过超晶格。 每个超晶格组可以包括限定基极半导体部分和其上的能带修饰层的多个层叠的基底半导体单层。 能带修改层可以包括限制在相邻基极半导体部分的晶格内的至少一个非半导体单层,使得超晶格可以在平行方向上具有比否则发生的更高的载流子迁移率。 超晶格也可以具有共同的能带结构。

    Method for making a semiconductor device comprising a superlattice channel vertically stepped above source and drain regions
    25.
    发明授权
    Method for making a semiconductor device comprising a superlattice channel vertically stepped above source and drain regions 有权
    一种用于制造半导体器件的方法,该半导体器件包括在源极和漏极区域之上垂直阶梯形的超晶格沟道

    公开(公告)号:US07018900B2

    公开(公告)日:2006-03-28

    申请号:US10940418

    申请日:2004-09-14

    申请人: Scott A. Kreps

    发明人: Scott A. Kreps

    IPC分类号: H01L29/80 H01L31/112

    摘要: A method for making a semiconductor device may include providing a semiconductor substrate and forming at least one metal oxide semiconductor field-effect transistor (MOSFET). The at least one MOSFET may be formed by forming a superlattice channel including a plurality of stacked groups of layers on the semiconductor substrate. Each group of layers of the superlattice channel may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor. The method may further include forming a gate overlying the superlattice channel, and forming source and drain regions in the semiconductor substrate on opposing sides of the superlattice channel so that the superlattice channel has upper surface portions vertically stepped above adjacent upper surface portions of the source and drain regions.

    摘要翻译: 制造半导体器件的方法可以包括提供半导体衬底并形成至少一个金属氧化物半导体场效应晶体管(MOSFET)。 可以通过在半导体衬底上形成包括多个层叠层的超晶格沟道来形成至少一个MOSFET。 超晶格通道的每组层可以包括在其上限定基极半导体部分和能带修饰层的多个层叠的基底半导体单层。 能带修改层可以包括约束在相邻基极半导体的晶格内的至少一个非半导体单层。 该方法还可以包括形成覆盖超晶格沟道的栅极,以及在超晶格沟道的相对侧上的半导体衬底中形成源极和漏极区域,使得超晶格沟道具有在源极的相邻上表面部分上方的上表面部分, 漏区。

    Method for making semiconductor device including band-engineered superlattice
    27.
    发明授权
    Method for making semiconductor device including band-engineered superlattice 有权
    制造半导体器件的方法,包括带状工程超晶格

    公开(公告)号:US06830964B1

    公开(公告)日:2004-12-14

    申请号:US10647061

    申请日:2003-08-22

    IPC分类号: H01L2120

    摘要: A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.

    摘要翻译: 一种通过形成超晶格来制造半导体器件的方法,该超晶格又包括多个堆叠的层组。 该方法还可以包括形成区域,用于使电荷载体相对于层叠的层组在平行方向上通过超晶格。 每个超晶格组可以包括限定基极半导体部分和其上的能带修饰层的多个层叠的基底半导体单层。 能带修改层可以包括限制在相邻基极半导体部分的晶格内的至少一个非半导体单层,使得超晶格可以在平行方向上具有比否则发生的更高的载流子迁移率。 超晶格也可以具有共同的能带结构。