公开(公告)号：US20160043181A1

公开(公告)日：2016-02-11

申请号：US14741567

申请日：2015-06-17

Applicant: Semiconductor Components Industries, LLC

Inventor： Chun-Li LIU ,  Ali SALIH

IPC: H01L29/20 ,  H01L29/06 ,  H01L29/786

CPC classification number: H01L29/2003 ,  H01L29/1083 ,  H01L29/404 ,  H01L29/42376 ,  H01L29/7783 ,  H01L29/78681 ,  H01L29/78696

Abstract: An electronic device can transistor having a channel layer that includes a compound semiconductor material. In an embodiment, the channel layer overlies a semiconductor layer that includes a carrier barrier region and a carrier accumulation region. The charge barrier region can help to reduce the likelihood that de-trapped carriers from the channel layer will enter the charge barrier region, and the charge accumulation region can help to repel carriers in the channel layer away from the charge barrier layer. In another embodiment, a barrier layer overlies the channel layer. Embodiments described herein may help to produce lower dynamic on-resistance, lower leakage current, another beneficial effect, or any combination thereof.

Abstract translation: 电子器件可以具有包括化合物半导体材料的沟道层的晶体管。 在一个实施例中，沟道层覆盖包括载流子阻挡区域和载流子积聚区域的半导体层。 电荷势垒区域可以帮助减少从捕获的载流子从沟道层进入电荷势垒区域的可能性，并且电荷累积区域可以帮助排斥沟道层中的载流子远离电荷阻挡层。 在另一个实施例中，阻挡层覆盖在沟道层上。 本文描述的实施例可以有助于产生较低的动态导通电阻，较低的漏电流，另一有益效果或其任何组合。