公开(公告)号：US20160322485A1

公开(公告)日：2016-11-03

申请号：US15133657

申请日：2016-04-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Chun-Li LIU ,  Peter MOENS

IPC: H01L29/747 ,  H01L23/495 ,  H01L29/74 ,  H01L27/088 ,  H01L29/20 ,  H01L29/778

CPC classification number: H01L29/747 ,  H01L21/8258 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/40 ,  H01L25/115 ,  H01L25/18 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/205 ,  H01L29/404 ,  H01L29/4238 ,  H01L29/7416 ,  H01L29/742 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H03K17/6874 ,  H03K2017/6878 ,  H03K2217/0009 ,  H03K2217/0018 ,  H01L2224/37099

Abstract: An electronic device can include a bidirectional HEMT. In an aspect, a packaged electronic device can include the bidirectional HEMT can be part of a die having a die substrate connection that is configured to be at a fixed voltage, electrically connected to drain/source or source/drain depending on current flow through the bidirectional HEMT, or electrically float. In another aspect, the electronic device can include Kelvin connections on both the drain/source and source/drain side of the circuit. In a further embodiment, a circuit can include the bidirectional HEMT, switch transistors, and diodes with breakdown voltages to limit voltage swings at the drain/source and source/drain of the switch transistors.

Abstract translation: 电子设备可以包括双向HEMT。 一方面，封装的电子设备可以包括双向HEMT可以是具有被配置为处于固定电压的管芯衬底连接的管芯的一部分，其电连接到漏极/源极或源极/漏极，这取决于通过 双向HEMT或电浮动。 在另一方面，电子设备可以在电路的漏极/源极和源极/漏极侧上包括开尔文连接。 在另一实施例中，电路可以包括双向HEMT，开关晶体管和具有击穿电压的二极管，以限制开关晶体管的漏极/源极和源极/漏极处的电压摆幅。

公开(公告)号：US20200006202A1

公开(公告)日：2020-01-02

申请号：US16569218

申请日：2019-09-12

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Woochul JEON ,  Chun-Li LIU

IPC: H01L23/482 ,  H01L29/778 ,  H01L29/20 ,  H01L29/417 ,  H01L23/535

Abstract: Implementations of semiconductor devices may include: a first layer with a plurality of cells, each cell having a drain finger, a source finger and a gate ring; a second layer having a drain pad and a source pad, the drain pad having a width and a source pad having a width substantially the same as the drain pad; wherein a width of each drain finger of the first layer is wider than a width of each source finger of the first layer; and wherein each drain pad is coupled to each drain finger through a first contact and the source pad is coupled to each source finger through a second contact, where a width of the first contact is wider than a width of the second contact.

公开(公告)号：US20190123043A1

公开(公告)日：2019-04-25

申请号：US16225930

申请日：2018-12-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Zia HOSSAIN ,  Chun-Li LIU ,  Woochul JEON ,  Jason MCDONALD

IPC: H01L27/06 ,  H01L29/10 ,  H01L27/02 ,  H01L23/367 ,  H01L29/417 ,  H01L29/778 ,  H01L21/74 ,  H01L21/8258

Abstract: A method for forming a cascode rectifier structure includes providing a group III-V semiconductor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are provided adjacent a major surface of the heterostructure and a control electrode is provided between the first and second current carrying electrode. A rectifier device is provided integrated with the group III-V semiconductor structure and is electrically connected to the first current carrying electrode and to a third electrode. The control electrode is provided further electrically connected to the semiconductor substrate and the second current path is generally perpendicular to a primary current path between the first and second current carrying electrodes. The cascode rectifier structure is provided as a two terminal device.

公开(公告)号：US20170358647A1

公开(公告)日：2017-12-14

申请号：US15581170

申请日：2017-04-28

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Peter MOENS ,  Jia GUO ,  Ali SALIH ,  Chun-Li LIU

IPC: H01L29/10 ,  H01L29/205 ,  H01L29/417 ,  H01L29/20 ,  H01L29/778 ,  H01L29/66

CPC classification number: H01L29/7783 ,  H01L21/0254 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/404 ,  H01L29/41766 ,  H01L29/66431 ,  H01L29/66446 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7782 ,  H01L29/7787 ,  H01L2924/13064

Abstract: An electronic device can include a HEMT including at least two channel layers. In an embodiment, a lower semiconductor layer overlies a lower channel layer, wherein the lower semiconductor layer has an aluminum content that is at least 10% of a total metal content of the lower semiconductor layer. An upper semiconductor layer overlies the upper channel layer, wherein the upper semiconductor layer has an aluminum content that is greater as compared to the lower semiconductor layer. In another embodiment, an electronic device can include stepped source and drain electrodes, so that lower contact resistance can be achieved. In a further embodiment, an absolute value of a difference between pinch-off or threshold voltages between different channel layers is greater than 1 V and allows current to be turned on or turned off for a channel layer without affecting another channel layer.

公开(公告)号：US20180026123A1

公开(公告)日：2018-01-25

申请号：US15214579

申请日：2016-07-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Woochul JEON ,  Chun-Li LIU

IPC: H01L29/778 ,  H01L29/417 ,  H01L23/535 ,  H01L29/20

CPC classification number: H01L29/7787 ,  H01L23/4824 ,  H01L23/535 ,  H01L29/2003 ,  H01L29/41758 ,  H01L29/7786

Abstract: Implementations of semiconductor devices may include: a first layer with a plurality of cells, each cell having a drain finger, a source finger and a gate ring; a second layer having a drain pad and a source pad, the drain pad having a width and a source pad having a width substantially the same as the drain pad; wherein a width of each drain finger of the first layer is wider than a width of each source finger of the first layer; and wherein each drain pad is coupled to each drain finger through a first contact and the source pad is coupled to each source finger through a second contact, where a width of the first contact is wider than a width of the second contact.

公开(公告)号：US20170025405A1

公开(公告)日：2017-01-26

申请号：US14808627

申请日：2015-07-24

Applicant: Semiconductor Components Industries, LLC

Inventor： Woochul JEON ,  Joe FULTON ,  Chun-Li LIU

IPC: H01L27/06 ,  H01L29/778

CPC classification number: H01L27/0629 ,  H01L29/778 ,  H03K17/6871 ,  H03K2017/6875 ,  H03K2217/0036

Abstract: A circuit can include a transistor coupled to a resistor or a diode. In an embodiment, the circuit can include a pair of transistors arranged in a cascode configuration, and each of the transistors can have a corresponding component connected in parallel. In a particular embodiment, the components can be resistors, and in another particular, embodiment, the components can be diodes. The circuit can have less on-state resistance as compared to a circuit in which only one of the components is used, and reduces the off-state voltage on the gate of a high-side transistor. An integrated circuit can include a high electron mobility transistor structure and a resistor, a diode, a pair of resistors, or a pair of diodes.

Abstract translation: 电路可以包括耦合到电阻器或二极管的晶体管。 在一个实施例中，电路可以包括以共源共极配置布置的一对晶体管，并且每个晶体管可以具有并联连接的相应部件。 在特定实施例中，组件可以是电阻器，并且在另一特定实施例中，组件可以是二极管。 与仅使用一个部件的电路相比，该电路可以具有较小的导通电阻，并且降低高侧晶体管的栅极上的截止电压。 集成电路可以包括高电子迁移率晶体管结构和电阻器，二极管，一对电阻器或一对二极管。

公开(公告)号：US20160336313A1

公开(公告)日：2016-11-17

申请号：US14713777

申请日：2015-05-15

Applicant: Semiconductor Components Industries, LLC

Inventor： Woochul JEON ,  Chun-Li LIU

IPC: H01L27/07 ,  H01L29/20 ,  H01L29/423 ,  H01L29/78 ,  H01L29/778 ,  H01L29/861

CPC classification number: H01L29/861 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0727 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66462 ,  H01L29/7786

Abstract: An integrated circuit can include a pair of transistors connected in a cascode configuration. In an embodiment, an anode of a diode can be disposed between the gate electrodes of the transistors. In another embodiment, the transistors can include the transistors and a diode, wherein the anode of the diode is coupled to a current electrode of a transistor; and the cathode is coupled to a current electrode of the other transistor. In a particular embodiment, one of the transistors can be an enhancement mode transistor, and the other transistor can be a depletion mode, high mobility electron transistor.

Abstract translation: 集成电路可以包括以共源共享结构连接的一对晶体管。 在一个实施例中，二极管的阳极可以设置在晶体管的栅电极之间。 在另一个实施例中，晶体管可以包括晶体管和二极管，其中二极管的阳极耦合到晶体管的电流电极; 并且阴极耦合到另一晶体管的电流电极。 在特定实施例中，晶体管之一可以是增强型晶体管，而另一晶体管可以是耗尽型，高迁移率电子晶体管。

公开(公告)号：US20160064325A1

公开(公告)日：2016-03-03

申请号：US14939873

申请日：2015-11-12

Applicant: Semiconductor Components Industries, LLC

Inventor： Ali SALIH ,  Chun-Li LIU ,  Gordon M. GRIVNA

IPC: H01L23/522 ,  H01L23/532 ,  H01L29/778

CPC classification number: H01L23/5226 ,  H01L21/6836 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/4824 ,  H01L23/49827 ,  H01L23/53228 ,  H01L23/53242 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/84 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7787 ,  H01L2221/68327 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/04034 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/37012 ,  H01L2224/37013 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/3716 ,  H01L2224/37187 ,  H01L2224/3719 ,  H01L2224/37639 ,  H01L2224/37644 ,  H01L2224/37647 ,  H01L2224/37655 ,  H01L2224/37664 ,  H01L2224/40499 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/8485 ,  H01L2924/00014 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/014 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2924/01029 ,  H01L2924/07811 ,  H01L2224/45099

Abstract: In one embodiment, a method of forming a HEMT device may include plating a conductor or a plurality of conductors onto an insulator that overlies a plurality of current carrying electrodes of the HEMT device. The method may also include attaching a connector onto the conductor or attaching a plurality of connectors onto the plurality of conductors.

Abstract translation: 在一个实施例中，形成HEMT器件的方法可以包括将导体或多个导体电镀到覆盖在HEMT器件的多个载流电极上的绝缘体上。 该方法还可以包括将连接器附接到导体上或者将多个连接器附接到多个导体上。

公开(公告)号：US20190245072A1

公开(公告)日：2019-08-08

申请号：US16387874

申请日：2019-04-18

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Woochul JEON ,  Chun-Li LIU ,  Ali SALIH

IPC: H01L29/778 ,  H01L23/58 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L23/495 ,  H01L29/40 ,  H01L29/20 ,  H01L29/417 ,  H01L29/16

CPC classification number: H01L29/778 ,  H01L23/4952 ,  H01L23/49537 ,  H01L23/585 ,  H01L27/0883 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/1066 ,  H01L29/16 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41758 ,  H01L29/42316

Abstract: Implementations of semiconductor devices may include: a plurality of drain fingers and a plurality of source fingers interdigitated with one another; at least one gate; and at gate bus formed to completely surround the plurality of drain fingers and the plurality of source fingers; wherein the gate bus is mechanically and electrically coupled to the at least one gate.

公开(公告)号：US20180240900A1

公开(公告)日：2018-08-23

申请号：US15955555

申请日：2018-04-17

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Woochul JEON ,  Chun-Li LIU ,  Ali SALIH

IPC: H01L29/778 ,  H01L23/495 ,  H01L29/20 ,  H01L29/417 ,  H01L29/06 ,  H01L29/40 ,  H01L27/088 ,  H01L29/16

CPC classification number: H01L29/778 ,  H01L23/4952 ,  H01L23/49537 ,  H01L23/585 ,  H01L27/0883 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/1066 ,  H01L29/16 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41758 ,  H01L29/42316

Abstract: Implementations of semiconductor devices may include: a plurality of drain fingers and a plurality of source fingers interdigitated with one another; at least one gate; and at gate bus formed to completely surround the plurality of drain fingers and the plurality of source fingers; wherein the gate bus is mechanically and electrically coupled to the at least one gate.