公开(公告)号：US20210305809A1

公开(公告)日：2021-09-30

申请号：US17108497

申请日：2020-12-01

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Tao Yi HUNG ,  Ming-Fang LAI ,  Li-Wei CHU ,  Wun-Jie LIN ,  Jam-Wem LEE

IPC: H02H9/04 ,  H01L27/02 ,  H01L21/8234

Abstract: A clamp circuit includes an electrostatic discharge (ESD) detection circuit coupled between a first node and a second node. The clamp circuit further includes a first transistor of a first type. The first transistor has a first gate coupled to at least the ESD detection circuit by a third node, a first drain coupled to the first node and a first source coupled to the second node. The clamp circuit further includes a charging circuit coupled between the second node and the third node, and configured to charge the third node during an ESD event at the second node.

公开(公告)号：US20210305802A1

公开(公告)日：2021-09-30

申请号：US17147253

申请日：2021-01-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Yu-Hung YEH ,  Wun-Jie LIN ,  Jam-Wem LEE

IPC: H02H3/08 ,  H02H1/00

Abstract: An electrostatic discharge (ESD) protection circuit includes a first diode, a second diode and an ESD clamp circuit. The first diode is in a semiconductor wafer, and is coupled to an input output (IO) pad. The second diode is in the semiconductor wafer, and is coupled to the first diode and the IO pad. The ESD clamp circuit is in the semiconductor wafer, and is coupled to the first diode and the second diode. The ESD clamp circuit includes a first signal tap region in the semiconductor wafer. The first signal tap region is coupled to a first voltage supply. The first diode is coupled to and configured to share the first signal tap region with the ESD clamp circuit.