公开(公告)号：US6001679A

公开(公告)日：1999-12-14

申请号：US10853

申请日：1998-01-22

申请人： Han Lin

发明人： Han Lin

IPC分类号： H01L21/8244 ,  H01L27/11

CPC分类号： H01L27/11 ,  H01L27/1112

摘要： A method for manufacturing SRAM polysilicon loads that utilizes a silicon dioxide layer formed between an interconnect and a load as barrier in preventing the out-diffusion of heavily doped impurities into the lightly doped or undoped polysilicon load. Hence, the effective length and the resistance of the polysilicon load can be maintained, and the dimensions of SRAM devices can be further reduced. Furthermore, the prevention of out-diffusion from a heavily doped interconnect region into a lightly doped load region serves to maintain the electrical conductivity of interconnects. Therefore, SRAM device fabrication is more easily controlled, and product reliability can be increased.

摘要翻译： 一种用于制造SRAM多晶硅负载的方法，其利用在互连和负载之间形成的二氧化硅层作为阻挡层，以防止重掺杂的杂质向轻掺杂或未掺杂的多晶硅负载的扩散。 因此，可以保持多晶硅负载的有效长度和电阻，并且可以进一步减小SRAM器件的尺寸。 此外，防止从重掺杂互连区域扩散到轻掺杂负载区域的扩散用于维持互连的导电性。 因此，SRAM器件制造更容易控制，并且可以提高产品的可靠性。

公开(公告)号：US5966604A

公开(公告)日：1999-10-12

申请号：US890363

申请日：1997-07-09

申请人： Han Lin ,  Jengping Lin ,  Sun-Chieh Chien

发明人： Han Lin ,  Jengping Lin ,  Sun-Chieh Chien

IPC分类号： H01L21/265 ,  H01L21/285 ,  H01L21/336 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L29/6659 ,  H01L21/28525 ,  H01L29/1045 ,  H01L21/26586 ,  H01L29/7833

摘要： The present invention relates to a method of manufacturing MOS components having lightly doped drains wherein the implanting type ion used is different than that used in the formation of the source/drain regions. The present invention also includes the use of a tilt implantation angle accompanied by substrate rotation during the implantation process to form lightly doped drain structures on two sides of the source/drain regions. The mask is the same for the formation of the source/drain regions as that for the formation of the lightly doped drain regions. The method of manufacturing MOS components having lightly doped drains according to this invention has fewer manufacturing processes for the formation of spacers than the conventional methods. Moreover, the reduction in spacer production results in an increased contact surface area for subsequent contact window formation, thereby lowering contact resistance.

摘要翻译： 本发明涉及一种制造具有轻掺杂漏极的MOS元件的方法，其中使用的注入型离子不同于形成源极/漏极区所用的离子。 本发明还包括在注入工艺期间伴随着衬底旋转的倾斜注入角度的使用，以在源极/漏极区域的两侧上形成轻掺杂的漏极结构。 掩模与用于形成轻掺杂漏极区的源极/漏极区相同。 根据本发明的制造具有轻掺杂漏极的MOS元件的制造方法比常规方法具有更少的用于形成间隔物的制造工艺。 此外，间隔物生产的减少导致随后的接触窗形成的接触表面积增加，从而降低接触电阻。