公开(公告)号：US20210013334A1

公开(公告)日：2021-01-14

申请号：US16533812

申请日：2019-08-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shin-Chuan Huang ,  Chih-Tung Yeh ,  Chun-Ming Chang ,  Bo-Rong Chen ,  Wen-Jung Liao ,  Chun-Liang Hou

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/20 ,  H01L29/205 ,  H01L21/265

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

公开(公告)号：US09349728B1

公开(公告)日：2016-05-24

申请号：US14670428

申请日：2015-03-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Fu Hsu ,  Bo-Rong Chen

IPC: H01L23/535 ,  H01L27/088 ,  H01L21/8258 ,  H01L29/786

CPC classification number: H01L27/088 ,  H01L21/8258 ,  H01L23/485 ,  H01L27/1225 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a metal-oxide semiconductor (MOS) transistor thereon and a first interlayer dielectric (ILD) layer surrounding the MOS transistor; forming a source layer, a drain layer, a first opening between the source layer and the drain layer, and a second ILD layer on the MOS transistor and the first ILD layer, wherein the top surfaces of the source layer, the drain layer, and the second ILD layer are coplanar; forming a channel layer on the second ILD layer, the source layer, and the drain layer and into the first opening; and performing a first planarizing process to remove part of the channel layer so that the top surface of the channel layer is even with the top surfaces of the source layer and the drain layer.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供其上具有金属氧化物半导体（MOS）晶体管的衬底和围绕MOS晶体管的第一层间电介质（ILD）层; 在源极层和漏极层之间形成源极层，漏极层，第一开口以及MOS晶体管和第一ILD层上的第二ILD层，其中源极层，漏极层和 第二ILD层是共面的; 在第二ILD层，源极层和漏极层上形成沟道层并进入第一开口; 并且执行第一平坦化处理以去除沟道层的一部分，使得沟道层的顶表面与源极层和漏极层的顶表面平齐。