公开(公告)号：US20080007272A1

公开(公告)日：2008-01-10

申请号：US11056822

申请日：2005-02-10

申请人： Frank Ferraiolo ,  Anuja Sehgal ,  Peilin Song ,  Michael Sperling

发明人： Frank Ferraiolo ,  Anuja Sehgal ,  Peilin Song ,  Michael Sperling

IPC分类号： G01R27/28

CPC分类号： G01R31/30 ,  G01R31/2884 ,  G01R31/3016 ,  G01R31/31721

摘要： On-chip sensor to detect power supply vulnerabilities. The on-chip sensor employs a sensitive delay chain and an insensitive delay chain to detect power supply undershoots and overshoots without requiring external off-chip components. Undershoots and overshoots outside a user-defined threshold are detected. The undershoots and overshoots are indicated by a relative difference in phase of the two delay chains. The two delay chains are programmable to detect various frequencies.

公开(公告)号：US6098176A

公开(公告)日：2000-08-01

申请号：US16788

申请日：1998-01-30

申请人： Paul William Coteus ,  Daniel Mark Dreps ,  Frank Ferraiolo ,  Gerard Vincent Kopcsay ,  Todd Edward Takken

发明人： Paul William Coteus ,  Daniel Mark Dreps ,  Frank Ferraiolo ,  Gerard Vincent Kopcsay ,  Todd Edward Takken

IPC分类号： G06F1/10 ,  G06F1/12

CPC分类号： G06F1/10

摘要： A clock signal distribution system is disclosed for providing synchronous clock signals to a plurality of electronic circuit devices. The system includes a clock signal generator means for providing a single frequency sinusoidal clock signal output and a plurality of electronic circuit devices. A clock signal distribution network including interconnected resonant segments of a transmission line 13 connected to the clock signal of the clock signal generator and to the plurality of electronic circuit devices for providing separate synchronous, phase aligned clock signals to the electronic circuit devices. The transmission line segments have lengths matched to the clock signal frequency wavelengths to eliminate clock signal distribution problems such as skew, jitter and pulse distortions.

摘要翻译： 公开了一种用于向多个电子电路装置提供同步时钟信号的时钟信号分配系统。 该系统包括用于提供单频正弦时钟信号输出的时钟信号发生器装置和多个电子电路装置。 时钟信号分配网络，包括连接到时钟信号发生器的时钟信号的传输线路13的互连谐振段，以及多个电子电路装置，用于向电子电路装置提供单独的同步相位对准的时钟信号。 传输线段具有与时钟信号频率波长匹配的长度，以消除诸如偏斜，抖动和脉冲失真的时钟信号分配问题。