公开(公告)号：US20210028866A1

公开(公告)日：2021-01-28

申请号：US17066624

申请日：2020-10-09

Applicant: X DEVELOPMENT LLC

Inventor： Bruce Moision ,  Devin Brinkley ,  Baris Ibrahim Erkmen

IPC: H04B10/80 ,  H04B10/291 ,  H04B10/564

Abstract: An optical communication system includes an optical transmitter and one or more processors. The optical transmitter is configured to output an optical signal, and includes an average-power-limited optical amplifier, such as an erbium-doped fiber amplifier (EDFA). The one or more processors are configured to receive optical signal data related to a received power for a communication link from a remote communication system and determine that the optical signal data is likely to fall below a minimum received power within a time interval. In response to the determination, the one or more processors are configured to determine a duty cycle of the optical transmitter based on a minimum on-cycle length and a predicted EDFA output power and operate the optical transmitter using the determined duty cycle to transmit an on-cycle power that is no less than the minimum required receiver power for error-free operation of the communication link.

公开(公告)号：US20200228209A1

公开(公告)日：2020-07-16

申请号：US16529337

申请日：2019-08-01

Applicant: X Development LLC

Inventor： Bruce Moision ,  Devin Brinkley ,  Baris Ibrahim Erkmen

IPC: H04B10/80 ,  H04B10/564 ,  H04B10/291

Abstract: An optical communication system includes an optical transmitter and one or more processors. The optical transmitter is configured to output an optical signal, and includes an average-power-limited optical amplifier, such as an erbium-doped fiber amplifier (EDFA). The one or more processors are configured to receive optical signal data related to a received power for a communication link from a remote communication system and determine that the optical signal data is likely to fall below a minimum received power within a time interval. In response to the determination, the one or more processors are configured to determine a duty cycle of the optical transmitter based on a minimum on-cycle length and a predicted EDFA output power and operate the optical transmitter using the determined duty cycle to transmit an on-cycle power that is no less than the minimum required receiver power for error-free operation of the communication link.

公开(公告)号：US20200228201A1

公开(公告)日：2020-07-16

申请号：US16828111

申请日：2020-03-24

Applicant: X DEVELOPMENT LLC

Inventor： Devin Brinkley ,  Bruce Moision ,  Paul Csonka ,  Baris Erkmen

IPC: H04B10/079 ,  H04B10/11

Abstract: The disclosure provides a communication system that includes sensors, a plurality of components, and processors. The sensors receive measurements related to a state of the communication system. The processors receive an indication of an amount of received power at a remote communication system and estimate a state of the plurality of components based on the received one or more measurements and the received indication. Using the indication and the estimated state, the processors determine whether the amount of received power is likely to fall below a minimum received power within a given time interval. When it is likely, the processors select an adjustment technique of a plurality of adjustment techniques for adjusting a data rate of the outbound signal and adjust a given component of the communication system using the selected adjustment technique to change the data rate of the outbound signal.

公开(公告)号：US10708009B2

公开(公告)日：2020-07-07

申请号：US16781381

申请日：2020-02-04

Applicant: X DEVELOPMENT LLC

Inventor： Bruce Moision ,  Edward Keyes ,  Oliver Bowen ,  Devin Brinkley ,  Baris Erkmen

IPC: H04B10/00 ,  H04L1/18 ,  H04B10/112

Abstract: Aspects of the disclosure provide techniques for automatic repeat request (ARQ) in a free-space optical communication (FSOC) architecture. These techniques, including block-selective ARQ, adaptive retransmission delay, and random seed scrambling, can be used individually or in combination to combat problems involving frame loss or corruption. These techniques enable the system to rapidly recover by streamlining the retransmission process. For instance, block-selective ARQ acknowledges variable length blocks of frames in the return stream from the receiver to the transmitter. Adaptive retransmission delay allows the retransmission delay to grow in the absence of feedback by the receiver, up to some defined limit. And with random seed sampling, a scrambling sequence is incorporated to aid with frame syncing, which avoids the need for a line code. These aspects of the technology provide a robust communication process, and also reduce overhead costs associated with unnecessary retransmissions.

公开(公告)号：US10686521B1

公开(公告)日：2020-06-16

申请号：US16255263

申请日：2019-01-23

Applicant: X Development LLC

Inventor： Travis Lantz ,  Paul Csonka ,  Bruce Moision

IPC: H04B10/08 ,  H04B10/079 ,  H04B10/112

Abstract: The disclosure provides for a communication system that includes one or more sensors and one or more processors. The one or more processors are configured to receive, during a first timeframe, a first indication of an error rate of a communication link, a second indication of an amount of received power at a remote communication system, and one or more measurements related to the state of the communication system. The one or more processors are then configured to estimate a plurality of disturbance values to the communication system according to the one or more measurements and the second indication. Each disturbance value is associated with a set of components of the communication system. The one or more processors are configured to adjust a beam divergence of a beacon beam or a communication beam transmitted from the communication system based on the plurality of disturbance values and the first indication.

公开(公告)号：US10447313B2

公开(公告)日：2019-10-15

申请号：US15824111

申请日：2017-11-28

Applicant: X Development LLC

Inventor： Bruce Moision ,  Edward Keyes ,  Baris Erkmen ,  Oliver Bowen

IPC: H03M13/27 ,  H04L1/00

Abstract: The disclosure may provide for a communication method and system. A transmitter of the communication system may include an interleaver and a first encoder for determining parity bits. The transmitter also may include a multiplexer for joining the parity bits with the data. A second encoder may be positioned after the multiplexer for implementing an error correcting code. A receiver of the communication system may include a decoder followed by an interleaver. When errors are detected in received data at the decoder, one or more processors of the receiver may be configured to correct portions of the received data and combine the corrected portions with the received data.