公开(公告)号：US12238329B2

公开(公告)日：2025-02-25

申请号：US18384984

申请日：2023-10-30

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/513 ,  H04N19/86

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: derives a motion vector of a current block by referring to at least one reference picture different from a picture to which the current block belongs; performs a mode for estimating, for each sub-block unit of sub-blocks obtained by splitting the current block, a surrounding region of the motion vector to correct the motion vector; determines whether to apply deblocking filtering to each of boundaries between neighboring ones of the sub-blocks; and applies the deblocking filtering to the boundary, based on a result of the determination.

公开(公告)号：US12238328B2

公开(公告)日：2025-02-25

申请号：US18514809

申请日：2023-11-20

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Han Boon Teo ,  Kiyofumi Abe ,  Tadamasa Toma ,  Takahiro Nishi

IPC: H04N19/52 ,  H04N19/12 ,  H04N19/174 ,  H04N19/182

Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: corrects a base motion vector using a correction value for correcting the base motion vector in a predetermined direction; and encodes a current partition to be encoded in an image of a video, using the base motion vector corrected. The correction value is specified by a first parameter and a second parameter, the first parameter indicating a table to be selected from among a plurality of tables each including values, the second parameter indicating one of the values included in the table to be selected indicated by the first parameter. In each of the plurality of tables, a smaller value among the values is assigned a smaller index. Each of the plurality of tables includes a different minimum value among the values.

公开(公告)号：US12238278B2

公开(公告)日：2025-02-25

申请号：US18242133

申请日：2023-09-05

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh

IPC: H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/186

Abstract: An encoder includes memory and circuitry. The circuitry, using the memory, (i) selects a mode from among a plurality of modes each for deriving a motion vector, and derives a motion vector for a current block via the selected mode, and (ii) performs inter prediction encoding on the current block, using the derived motion vector, via one of a skip mode and a non-skip mode different from the skip mode. The plurality of modes include a plurality of first modes each for predicting the motion vector for the current block based on an encoded block neighboring the current block without encoding information indicating a motion vector into a stream. When a second mode included in the plurality of first modes is selected, the current block is encoded via the non-skip mode regardless of presence or absence of a residual coefficient.

公开(公告)号：US12206882B2

公开(公告)日：2025-01-21

申请号：US18510430

申请日：2023-11-15

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Ru Ling Liao ,  Han Boon Teo ,  Takahiro Nishi ,  Ryuichi Kanoh ,  Tadamasa Toma

IPC: H04N19/44 ,  H04N19/119 ,  H04N19/124 ,  H04N19/13 ,  H04N19/159 ,  H04N19/176 ,  H04N19/96

Abstract: An image encoder writes a first parameter and a second parameter to a bitstream, and derives a partition mode based on the first and second parameters. Responsive to the derived partition mode being a first partition mode, the image encoder executes the first partition mode including: splitting a block of a picture into a plurality of first blocks including a N×2N block sized N pixels by 2N pixels; splitting the N×2N block, wherein a ternary split is allowed to split the N×2N block in a vertical direction, which is a direction along the 2N pixels, into a plurality of sub blocks including at least one sub block sized N/4×2N, while a binary split is not allowed to split the N×2N block in the vertical direction into two sub blocks that are equally sized N/2×2N; and encoding the plurality of sub blocks.

公开(公告)号：US12184852B2

公开(公告)日：2024-12-31

申请号：US18530032

申请日：2023-12-05

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Sughosh Pavan Shashidhar ,  Hai Wei Sun ,  Chong Soon Lim ,  Ru Ling Liao ,  Han Boon Teo ,  Jing Ya Li ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh ,  Tadamasa Toma

IPC: H04N11/02 ,  H04N19/119 ,  H04N19/176 ,  H04N19/184 ,  H04N19/60

Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks. The minimum threshold value corresponds to a minimum size supported in a transform process.

公开(公告)号：US12177441B2

公开(公告)日：2024-12-24

申请号：US18334176

申请日：2023-06-13

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Ryuichi Kanoh ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/126 ,  H04N19/124 ,  H04N19/176 ,  H04N19/18 ,  H04N19/30 ,  H04N19/60

Abstract: Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.

公开(公告)号：US12167022B2

公开(公告)日：2024-12-10

申请号：US18390148

申请日：2023-12-20

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takashi Hashimoto ,  Takahiro Nishi ,  Tadamasa Toma ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/50 ,  H04N19/105 ,  H04N19/176 ,  H04N19/513

Abstract: A decoder that decodes a current block using a motion vector includes: a processor; and memory. Using the memory, the processor: derives a first candidate vector from one or more candidate vectors of one or more neighboring blocks that neighbor the current block; determines, in a first reference picture for the current block, a first adjacent region that includes a position indicated by the first candidate vector; calculates evaluation values of a plurality of candidate regions included in the first adjacent region; and determines a first motion vector of the current block, based on a first candidate region having a smallest evaluation value among the evaluation values. The first adjacent region is included in a first motion estimation region determined based on the position indicated by the first candidate vector.

公开(公告)号：US12167007B2

公开(公告)日：2024-12-10

申请号：US17675444

申请日：2022-02-18

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Han Boon Teo ,  Che-Wei Kuo ,  Hai Wei Sun ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/423 ,  H04N19/172 ,  H04N19/174 ,  H04N19/70

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry encodes second information indicating whether first information is present in a bitstream, the first information being regarding a subpicture which is a rectangular region in a picture, the picture including slices, and when the second information indicates that the first information is present in the bitstream, each of the slices is a rectangular slice and has a subpicture index indicating a subpicture to which the slice belongs.

公开(公告)号：US12149723B2

公开(公告)日：2024-11-19

申请号：US18368642

申请日：2023-09-15

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takahiro Nishi ,  Tadamasa Toma ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/44 ,  H04N19/119 ,  H04N19/176 ,  H04N19/70

Abstract: According to one aspect of the present disclosure, a decoder includes memory and a processor coupled to the memory. The processor is configured to split a current picture into tiles, generate a slice having a rectangular shape and located at a lower-right corner of the current picture, the slice including at least a part of a tile among the tiles, generate first information on a region of the slice with header information, the header information not including information identical to the first information, and decode the slice with the first information.

公开(公告)号：US12143639B2

公开(公告)日：2024-11-12

申请号：US17535873

申请日：2021-11-26

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/70 ,  H04N19/463

Abstract: An encoder includes memory and circuitry coupled to the memory. The circuitry stores a total number of temporal sub-layers in a bitstream into either a picture timing supplemental enhancement information (SEI) message or a buffering period SEI message, and encodes the total number of the temporal sub-layers.