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公开(公告)号：US20230154410A1
公开(公告)日：2023-05-18
申请号：US17642983
申请日：2020-10-23
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266 , G09G3/3233 , H10K59/131 , G11C19/28
CPC classification number: G09G3/3266 , G09G3/3233 , H10K59/131 , G11C19/28 , G09G2310/0286 , G09G2300/0426 , G09G2300/0842 , G09G2330/021
Abstract: A display panel includes a plurality of rows of sub-pixels and at least one gate driver circuit that are disposed on a base substrate. Each sub-pixel includes a pixel driver circuit and a light-emitting device coupled to the pixel driver circuit, and a gate driver circuit includes a plurality of shift registers that are cascaded and a plurality of control signal lines. A shift register is coupled to a plurality of pixel driver circuits in at least one row of sub-pixels and at least a part of the plurality of control signal lines, and includes a plurality of first thin film transistors that are divided into a plurality of first thin film transistors. At least one thin film transistor group is located in the display region and distributed between adjacent sub-pixels in a same row of sub-pixels.
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342.发明申请公开(公告)号：US20230125979A1
公开(公告)日：2023-04-27
申请号：US18077269
申请日：2022-12-08
Inventor： Xuehuan FENG , Pan XU
Abstract: The present disclosure relates to the field of display technology, and in particular, to a gate driving structure, an array substrate and a display device. The gate driving structure may include: a base substrate; a shift register, formed on the base substrate, and including a plurality of thin film transistors and at least one capacitor, the capacitor being coupled to the thin film transistor; and a signal wiring group, formed on the base substrate, and including a plurality of signal wirings spaced apart from each other, the signal wiring being coupled to the thin film transistor. An orthographic projection of the capacitor on the base substrate is at least partially overlapped with an orthographic projection of the signal wiring group on the base substrate.
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公开(公告)号：US11615743B2
公开(公告)日：2023-03-28
申请号：US17490054
申请日：2021-09-30
Inventor： Xuehuan Feng , Yongqian Li , Hao Liu
IPC: G09G3/3225 , G09G3/3266 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-circuit, a second sub-circuit, and a leakage prevention circuit. The first sub-circuit includes a first input circuit and a first output circuit, the first input circuit is configured to control a level of a first node in response to a first input signal. The second sub-circuit includes a second input circuit and the second output circuit. The leakage prevention circuit is connected to the first node, and is configured to control a level of the leakage prevention node under control of the level of the first node, so that a circuit connected between the first node and the leakage prevention node is turned off, and a circuit connected between the second node and the leakage prevention node is turned off.
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公开(公告)号：US20230084070A1
公开(公告)日：2023-03-16
申请号：US17770250
申请日：2021-04-15
Inventor： Xuehuan FENG , Yongqian LI
Abstract: The present disclosure provides a shift register unit, a signal generation unit circuit, a driving method and a display device. The shift register unit includes a first node control circuit, a second node control circuit and an output circuit, the first node control circuit is used to control a potential of a first node; the second node control circuit controls a potential of a second node; the output circuit is used to control and maintain the potential of the first node and the potential of the second node, and control to connect the output terminal and the second clock signal terminal under the control of the potential of the first node, and control to connect the input terminal and the second voltage terminal under the control of the potential of the second node.
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公开(公告)号：US20230033702A1
公开(公告)日：2023-02-02
申请号：US17791558
申请日：2020-12-23
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266
Abstract: A display panel (100), comprising: a substrate (1), a plurality of sub-pixels (2) and a gate driving circuit (3). The sub-pixels (2) comprise pixel driving circuits (21). The gate driving circuit (3) comprises multiple stages of cascaded shift registers (31), wherein one stage of shift registers (31) is electrically connected to a plurality of pixel driving circuits (21) in one row of sub-pixels (2). The gate driving circuit (3) further comprises: a plurality of cascaded input signal lines (34) and a plurality of cascaded display reset signal lines (35). Each cascaded input signal line (34) is configured to be connected to a shift signal end (CR ) of one stage of shift registers (31) and an input signal end (Iput) of another stage of shift registers (31); and each cascaded display reset signal line (35) is configured to be connected to the shift signal end (CR ) of one stage of shift registers (31) and a display reset signal end (STD) of another stage of shift registers. The display panel (100) is provided with a plurality of sub-pixel regions (S) used for arranging the plurality of sub-pixels (2), and first gap regions (D) located between two adjacent columns of sub-pixel regions (5); and the cascaded display reset signal lines (35) and the cascaded input signal lines (34) are both arranged in the first gap regions (D), and the two are arranged in different first gap regions (D).
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Patent Agency Ranking
公开(公告)号：US20230032598A1
公开(公告)日：2023-02-02
申请号：US17788558
申请日：2021-09-01
Inventor： Kangjian MIAO , Minghung HSU
Abstract: A display panel includes: a base substrate, a pixel defining layer, light-emitting portions, an electrode layer, a metal repelling portion, and an auxiliary electrode layer. The pixel defining layer includes opening regions and dams. The light-emitting portions are in the opening regions. The electrode layer is on the side of the light-emitting portions facing away from the base substrate. The metal repelling portion is on the side of the electrode layer facing away from the base substrate and in the opening regions. The auxiliary electrode layer is on the side of the pixel defining layer facing away from the base substrate, and includes auxiliary electrode portions located in the region where the dams are located. The auxiliary electrode portions are in contact with third portions of the electrode layer, and the material of the metal repelling portion and the material of the auxiliary electrode layer repel each other.
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公开(公告)号：US20230021680A1
公开(公告)日：2023-01-26
申请号：US17787943
申请日：2021-08-05
Inventor： Yongqian LI , Can YUAN
Abstract: A display substrate, including: a base, and a plurality of sub-pixels arranged on the base. At least one of the plurality of sub-pixels includes a pixel driving circuit and a light-emitting element electrically connected to the pixel driving circuit. The pixel driving circuit includes a plurality of transistors and at least one storage capacitor. In a direction perpendicular to the base, the display substrate includes: a semiconductor layer, a first metal layer, a second metal layer, a third metal layer and a fourth metal layer, which are sequentially arranged on the base. The semiconductor layer includes: an active layer of the plurality of transistors. The first metal layer includes at least a scanning line extending in a first direction, a gate electrode of the plurality of transistors, and a first capacitor electrode plate of the storage capacitor.
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公开(公告)号：US11539023B2
公开(公告)日：2022-12-27
申请号：US16577601
申请日：2019-09-20
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan , Enming Xie
Abstract: A display substrate and a manufacturing method thereof, and a display panel are provided. The display substrate includes a base substrate having a display region and a peripheral region adjacent to the display region, the peripheral region being provided therein with a gate driver-on-array circuit including a plurality of transistors and capacitors, all of the transistors are provided in a transistor region, at least a part of the plurality of capacitors are provided in a capacitor region, and the capacitor region is located on a side of the transistor region distal to the display region; and an encapsulation structure for encapsulating the display region and the transistor region together; the peripheral region further including a sealing region for arranging a sealing structure therein, the capacitor region is located in the sealing region, and the sealing region is provided on a side of the encapsulation structure distal to the display region.
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公开(公告)号：US11514838B2
公开(公告)日：2022-11-29
申请号：US17417282
申请日：2020-11-04
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G09G3/20 , G09G3/00
Abstract: The present disclosure relates to a gate drive circuit. The gate drive circuit includes: cascaded GOA units, first clock signal lines, second clock signal lines, connecting lines and electrostatic protection sub-circuits. The first clock signal lines are used to provide various clock signals to the GOA units. The second clock signal lines are used to, when any of the clock signal lines is broken, replace the broken clock signal line to transmit a corresponding clock signal. The electrostatic protection sub-circuits are electrically connected to corresponding first clock signal lines or corresponding second clock signal lines through the connecting lines. Orthographic projections of the connecting lines on a plane where corresponding first clock signal lines or corresponding second clock signal lines are located intersect with the corresponding first clock signal lines and the corresponding second clock signal lines, respectively.
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350.发明授权公开(公告)号：US11495153B2
公开(公告)日：2022-11-08
申请号：US17420054
申请日：2020-08-26
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/00 , G09G3/3275
Abstract: A pixel circuit includes: a first driving line, a second driving line, a data line, and a sensing line; a first pixel sub-circuit including a first writing unit, a first sensing unit, and a first driving unit, the first driving unit being configured to drive a first light-emitting unit to emit light; and a second pixel sub-circuit including a second writing unit, a second sensing unit, and a second driving unit, the second driving unit being configured to drive a second light-emitting unit to emit light. The first writing unit and the second sensing unit are connected to the first driving line, so as to be turned on or off synchronously under control of the first driving line. The second writing unit and the first sensing unit are connected to the second driving line, so as to be turned on or off synchronously under control of the second driving line.
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