公开(公告)号：US20140281050A1

公开(公告)日：2014-09-18

申请号：US13965109

申请日：2013-08-12

Applicant: Apple Inc.

Inventor： Andrew W. Vogan

IPC: G06F3/06

CPC classification number: G06F3/0634 ,  G06F3/0611 ,  G06F3/0659 ,  G06F3/0688

Abstract: In one embodiment, a memory system for managing priority based Input Output (I/O) command queuing for nonvolatile electrically erasable semiconductor memory comprises one or more banks of electrically erasable semiconductor memory coupled to a storage processor. The storage processor can processes access requests for the memory, and has components including: a command interface, an expectation table, and a mode selector. The command interface receives memory access requests, which include a tag to identify the request, and an external priority associated with the request. The expectation table includes a set of times associated with each of the external priority levels, which indicate the period in which a request having the external priority is expected. The mode selector selects from a set of storage processor operation modes including a standard mode and a preemption mode.

Abstract translation: 在一个实施例中，用于管理用于非易失性电可擦除半导体存储器的基于优先级的输入输出（I / O）命令排队的存储器系统包括耦合到存储处理器的一个或多个电可擦除半导体存储器组。 存储处理器可以处理对存储器的访问请求，并且具有包括命令接口，期望表和模式选择器的组件。 命令接口接收存储器访问请求，其中包括用于标识请求的标签以及与请求相关联的外部优先级。 期望表包括与每个外部优先级相关联的一组时间，其指示期望具有外部优先级的请求的周期。 模式选择器从包括标准模式和抢占模式的一组存储处理器操作模式中进行选择。