-
公开(公告)号:US12289978B2
公开(公告)日:2025-04-29
申请号:US17784643
申请日:2021-08-17
Inventor: Lu Bai , Yang Zhou , Xin Zhang , Junxiu Dai , Yi Zhang , Tinghua Shang , Bo Zhang , Yao Huang , Song Liu
IPC: H10K59/80 , H10K59/131
Abstract: A display substrate includes at least two barrier layers in a peripheral area of the display substrate. The at least two barrier layers includes a first barrier layer forming an enclosure; and a third barrier layer on a side of the first barrier layer closer to a display area. The third barrier layer includes one or more discontinuous portions.
-
公开(公告)号:US20250095589A1
公开(公告)日:2025-03-20
申请号:US18576574
申请日:2023-04-28
Applicant: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD. , BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Inventor: Jingwen Zhang , Yao Huang , Binyan Wang
IPC: G09G3/3266 , G11C19/28
Abstract: The present application relates to a shift register, a scanning driving circuit and a displaying device. The shift register includes a first inputting circuit, a first outputting circuit, a second inputting circuit, a second outputting circuit and a second controlling circuit. The second controlling circuit is electrically connected to a first node, a second node, a fifth voltage terminal, a second clock-signal terminal and a controlling terminal. The second controlling circuit is configured for, under the control of the signal of the second node, the control of a second clock signal and the control of the signal of the controlling terminal, when the first outputting circuit is switched on, disconnecting the electric connection between the first node and the fifth voltage terminal, and when the second outputting circuit is switched on, writing the signal of the fifth voltage terminal into the first node.
-
公开(公告)号:US12236890B2
公开(公告)日:2025-02-25
申请号:US18033365
申请日:2022-05-27
Inventor: Yao Huang , Juntao Chen , Juan Fang
IPC: G09G3/3266 , G11C19/28
Abstract: A shift register includes a first control sub-circuit, a second control sub-circuit, a pull-up control sub-circuit and an output control sub-circuit, wherein the first control sub-circuit is configured to provide a signal of a third power supply terminal or a clock signal terminal to a first node and a third node under the control of a signal input terminal, the clock signal terminal and a second node; the pull-up control sub-circuit is configured to provide a signal of a second power supply terminal to the first node under the control of the third node; the second control sub-circuit is configured to provide a signal of the signal input terminal to the second node and a fourth node under the control of the clock signal terminal and the first power supply terminal.
-
34.
公开(公告)号:US12223907B2
公开(公告)日:2025-02-11
申请号:US18021472
申请日:2022-04-21
IPC: G09G3/3258
Abstract: A pixel circuit includes a light-emitting element, a driving circuit, a first light-emission control circuit, a first initialization circuit, an energy storage circuit, a compensation control circuit and a data written-in circuit. A first terminal of the energy storage circuit is electrically connected to a control terminal of the driving circuit, and a second terminal of the energy storage circuit is electrically connected to a first electrode of the light-emitting element. The data written-in circuit writes a data voltage into a first terminal of the driving circuit under control of a written-in control signal. The compensation control circuit controls the control terminal of the driving circuit to be electrically connected to a second terminal of the driving circuit under control of a compensation control signal.
-
公开(公告)号:US20250046248A1
公开(公告)日:2025-02-06
申请号:US18702054
申请日:2023-08-01
Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. , BOE Technology Group Co., Ltd. , Beijing BOE Technology Development Co., Ltd.
Inventor: Mengmeng Du , Yao Huang , Tingliang Liu , Lang Liu , Yuxin Zhang , Xilei Cao , Cong Fan , Zhiwei Xiang , Xiangdan Dong , Hanchao Li
IPC: G09G3/3233 , H10K59/121 , H10K59/131
Abstract: An array substrate is provided. The array substrate includes a first semiconductor material layer and a second semiconductor material layer on a side of the first semiconductor material layer away from a base substrate. The first semiconductor material layer includes at least active layers of the driving transistor and the data write transistor. The second semiconductor material layer includes at least an active layer of the compensating transistor. A first capacitance is at least partially formed between a gate connecting pad and at least one of the second semiconductor material layer or a first node connecting line. A second capacitance is formed between the first node connecting line and a respective second gate line. The first capacitance is greater than the second capacitance.
-
公开(公告)号:US12213363B2
公开(公告)日:2025-01-28
申请号:US17800847
申请日:2021-09-30
Inventor: Binyan Wang , Yao Huang , Cong Liu , Yu Wang , Benlian Wang
IPC: H10K59/131 , G09G3/3233 , H10K59/121 , H10K59/126
Abstract: A display panel includes pixel-driving circuits distributed in an array along a first direction and a second direction and including a driving transistor and a capacitor with a first electrode connected to a gate of the driving transistor and a second electrode connected to a power line; a substrate base; a second conductive layer and a fifth conductive layer which is located on a side of the second conductive layer away from the substrate base and includes the power lines connected to at least one conductive wire. The second conductive layer, located on a side of the substrate base, includes second conductive portions corresponding to the pixel-driving circuits and forming the second electrode of a corresponding capacitor, and at least two adjacent second conductive portions form the conductive wire; orthographic projections of the power lines are spaced along the first direction and extend along the second direction.
-
公开(公告)号:US12213356B2
公开(公告)日:2025-01-28
申请号:US17771170
申请日:2021-05-31
IPC: H10K59/13 , H10K59/131
Abstract: A display substrate (1) and a display device, which can reduce the number of power lines (22), and improve the light transmittance of a first display sub-region (111). The display substrate (1) includes a first display sub-region (111) and a second display sub-region (112), where a light transmittance of the first display sub-region (111) is higher than that of the second display sub-region (112); the display substrate (1) includes: a plurality of first-type sub-pixels (21) and a plurality of power lines (22), where the first-type sub-pixels (21) and the power lines (22) are located in the first display sub-region (111); the first-type sub-pixels (21) are arranged in an array along a row direction (X) and a column direction (Y); each first-type sub-pixel (21) comprises a light emitting element and a pixel circuit for driving the light emitting element to emit light; the plurality of power lines (22) are connected to one another; the plurality of power lines (22) comprise at least one of first-type power lines (221) or second-type power lines (222), the first-type power lines (221) are configured to be connected to pixel circuits of the first-type sub-pixels (21) arranged along the row direction (X), and the second-type power lines (222) are configured to be connected to pixel circuits of the first-type sub-pixels (21) arranged in the column direction (Y); a sum of a number of the first-type power lines (221) and a number of the second-type power lines (222) is smaller than a sum of a number of rows and a number of columns of the array.
-
公开(公告)号:US12213355B2
公开(公告)日:2025-01-28
申请号:US17620371
申请日:2021-01-06
Inventor: Yao Huang , Yudiao Cheng , Cong Liu
IPC: H10K59/13 , G09G3/3233 , H10K59/121 , H10K59/131 , H10K59/65
Abstract: A display panel is described that includes a light-transmitting area, a main display area, a first transition display area, and a first wiring area. The display panel further includes: a plurality of first light-emitting units, a plurality of first pixel driving circuits, a plurality of first signal lines, a plurality of second signal lines, and a plurality of third signal lines. The plurality of first light-emitting units are located in the light-transmitting area; the plurality of first pixel driving circuits are located in the first transition display area; the plurality of first signal lines extend in the second direction and are located in the first transition display area for providing a potential signal to the first pixel driving circuit.
-
公开(公告)号:US12205542B2
公开(公告)日:2025-01-21
申请号:US18014766
申请日:2021-07-30
Inventor: Yao Huang , Benlian Wang , Ming Hu , Lang Liu , Kai Zhang , Weiyun Huang
IPC: G09G3/3233 , G09G3/20 , H10K59/121
Abstract: A pixel driving circuit includes: a driving transistor, a data write circuit, a threshold compensation circuit, a first capacitor, and a second capacitor. A gate of the driving transistor is coupled to a first node, a first electrode is coupled to a second node, and a second electrode is coupled to a third node. The data write circuit is configured to transmit a signal of a data signal terminal to the second node in response to a signal of a first gate driving signal terminal. The threshold compensation circuit is configured to communicate the first node with the third node in response to a signal of a second gate driving signal terminal. The first capacitor is coupled between the first node and the first gate driving signal terminal. The second capacitor is coupled between the first node and the second gate driving signal terminal.
-
公开(公告)号:US12190801B2
公开(公告)日:2025-01-07
申请号:US18385071
申请日:2023-10-30
Inventor: Yudiao Cheng , Benlian Wang , Yao Huang , Weiyun Huang , Lili Du , Yue Long
IPC: G09G3/20 , G09G3/3225 , G09G3/3233 , G09G3/3275 , H10K50/86 , H10K59/121 , H10K59/131 , H10K59/35 , H10K59/65 , H10K59/88 , H10K71/00 , H10K59/12
Abstract: The present disclosure discloses a display panel and a display device. The display panel includes a base substrate including a first display region and a second display region. Since pixel circuits for driving light-emitting elements in the second display region are only disposed in the first display region but not disposed in the second display region, the light transmittance of the second display region is ensured to be good. Correspondingly, the display panel in the present disclosure has a good display effect.
-
-
-
-
-
-
-
-
-