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公开(公告)号：US12239002B2
公开(公告)日：2025-02-25
申请号：US18263634
申请日：2022-07-06
Inventor： Jingjing Xu , Xueguang Hao , Chunyan Li , Lang Liu , Jingquan Wang
IPC: G06F3/044 , G06F3/041 , H10K59/126 , H10K59/131 , H10K59/40 , G09G3/3225
Abstract: A display substrate and a display device are provided. The display substrate includes a display region and an opening located in the display region, the opening penetrates through the display substrate, and the display substrate includes a base substrate, a driving circuit layer, a light-emitting component layer, an encapsulation layer, and a touch control layer. The driving circuit layer includes a first signal line at least partially surrounding the opening; the light-emitting component layer is provided on a side of the driving circuit layer away from the base substrate; the encapsulation layer is provided on a side of the light-emitting component layer away from the base substrate; the touch control layer includes a touch control electrode and a touch control compensation electrode at least partially surrounding the opening; the first signal line at least partially overlaps with the touch control compensation electrode.
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公开(公告)号：US12237587B2
公开(公告)日：2025-02-25
申请号：US18016063
申请日：2022-02-23
Abstract: A phased array antenna includes a phase shifter unit, a waveguide unit and a connection unit, the phase shifter unit has two substrate surfaces and includes at least one phase shifter having two feeding regions; a side where at least one of the substrate surfaces is located is provided with the waveguide unit having a waveguide cavity corresponding to at least one of the feeding regions of each phase shifter; the connection unit corresponds to each waveguide unit and includes an insulation body, the insulation body is fixedly connected with the substrate surface and the waveguide unit on the same side as the insulation body; the insulation body has a first hollow-out portion, the waveguide unit contacts the substrate surface through the first hollow-out portion, a first port of the waveguide cavity is located on a contact surface of the waveguide unit in the first hollow-out portion.
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公开(公告)号：US12231131B2
公开(公告)日：2025-02-18
申请号：US18498801
申请日：2023-10-31
Inventor： Xiangye Wei , Liming Xiu
Abstract: An integrated circuit is provided. The integrated circuit includes: a clock source configured to: generate a clock signal of the integrated circuit; at least two functional circuits; and at least two clock generators corresponding to the functional circuits and configured to: determine initial phases of the corresponding functional circuits, and generate clock signals of the functional circuits based on the clock signal of the integrated circuit and the initial phases, so as to keep the clock signals of all the functional circuits synchronized, wherein the initial phases are determined based on transmission distances, over which the clock signal of the integrated circuit is transmitted from the clock source to the functional circuits, and loads of the functional circuits.
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公开(公告)号：US12230217B2
公开(公告)日：2025-02-18
申请号：US18250327
申请日：2022-03-25
Inventor： Jingbo Xu , Wei Liu , Yipeng Chen
IPC: G09G3/3266 , G09G3/32 , G11C19/28
Abstract: A shift register includes: a first input circuit, a first output circuit, a second input circuit, a second output circuit and at least one functional circuit. The first input circuit is configured to transmit an input signal to the first node under control of a first control signal. The first output circuit is configured to transmit a first output signal to the first scan signal terminal under control of the first node. The second input circuit is configured to transmit a first voltage signal to the second node under control of a second control signal. The second output circuit is configured to transmit a second output signal to the first scan signal terminal under control of the second node. A functional circuit is configured to block a path between the functional input terminal and the functional output terminal under control of a functional control signal.
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公开(公告)号：US20250056977A1
公开(公告)日：2025-02-13
申请号：US18934124
申请日：2024-10-31
Inventor： Jingjing XU , Pan LI , Dacheng ZHANG
IPC: H10K59/122 , H10K59/131 , H10K59/35 , H10K59/38 , H10K59/80
Abstract: A display substrate, a preparation method thereof, and a display apparatus, the display substrate includes a base substrate; a drive circuit layer provided on the base substrate; a light-emitting structure layer provided on a side of the drive circuit layer away from the base substrate, the light-emitting structure layer includes a pixel defining layer and an organic light-emitting layer, the pixel defining layer defines multiple sub-pixel regions and includes a first opening at least partially exposing the drive circuit layer, the organic light-emitting layer is located in the sub-pixel region and is overlapped with the first opening of the pixel defining layer; and a color film structure layer provided on a side of the light-emitting structure layer away from the base substrate, the color film structure layer includes a color film and a black matrix, the black matrix includes a second opening at least partially exposing the first opening.
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Patent Agency Ranking
6.发明授权公开(公告)号：US12224234B2
公开(公告)日：2025-02-11
申请号：US17629358
申请日：2021-03-15
Inventor： Hu Meng
IPC: H01L23/498 , H01L21/02 , H01L21/288 , H01L21/311 , H01L21/3205 , H01L21/3213 , H01L21/56
Abstract: A manufacturing method of a metal grid includes: providing a base substrate; forming a pattern including a first dielectric layer on the base substrate through a patterning process such that the first dielectric layer has a first groove in a lattice shape; forming a second dielectric layer on a side of the first dielectric layer away from the base substrate such that the second dielectric layer is deposited at least on a sidewall of the first groove to form a second groove in a lattice shape; and forming a metal material in the second groove, and removing at least a part of a material of the second dielectric layer such that an orthographic projection of the part of the material of the second dielectric layer on the base substrate does not overlap with an orthographic projection of the metal material on the base substrate, to form a metal grid.
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公开(公告)号：US20250046248A1
公开(公告)日：2025-02-06
申请号：US18702054
申请日：2023-08-01
Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. , BOE Technology Group Co., Ltd. , Beijing BOE Technology Development Co., Ltd.
Inventor： Mengmeng Du , Yao Huang , Tingliang Liu , Lang Liu , Yuxin Zhang , Xilei Cao , Cong Fan , Zhiwei Xiang , Xiangdan Dong , Hanchao Li
IPC: G09G3/3233 , H10K59/121 , H10K59/131
Abstract: An array substrate is provided. The array substrate includes a first semiconductor material layer and a second semiconductor material layer on a side of the first semiconductor material layer away from a base substrate. The first semiconductor material layer includes at least active layers of the driving transistor and the data write transistor. The second semiconductor material layer includes at least an active layer of the compensating transistor. A first capacitance is at least partially formed between a gate connecting pad and at least one of the second semiconductor material layer or a first node connecting line. A second capacitance is formed between the first node connecting line and a respective second gate line. The first capacitance is greater than the second capacitance.
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公开(公告)号：US12212032B2
公开(公告)日：2025-01-28
申请号：US17920681
申请日：2021-11-21
Inventor： Jingwen Guo , Qianhong Wu , Feng Qu
Abstract: A phase shifter includes: a substrate; a first wiring and second wirings that are provided on one side of the substrate, wherein the second wirings are arranged on two opposite sides of the first wiring; at least one electrically conducting bridge, wherein the electrically conducting bridge and the first wiring intersect and are insulated from each other; and a first isolating part, wherein the first isolating part is provided on one side of the first wiring that is close to the electrically conducting bridge, and an orthographic projection on the substrate of a part of the electrically conducting bridge that intersects the first wiring is located within an orthographic projection of the first isolating part on the substrate; and a surface of one side of the first isolating part that is close to the electrically conducting bridge is not even.
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公开(公告)号：US20250031526A1
公开(公告)日：2025-01-23
申请号：US18709692
申请日：2023-04-25
Applicant: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD. , BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Inventor： Wei ZHANG , Ming HU , Haijun QIU , Xiangdan DONG , Yi ZHANG , Zhiliang JIANG , Rui WANG , Taofeng XIE , Hai ZHENG , Fengli JI , Haigang QING , Gukhwan SONG , Tingliang LIU , Yu WANG , Cong FAN
IPC: H10K59/122
Abstract: A display substrate and a display apparatus are provided. The display substrate includes sub-pixels, a pixel defining pattern, and a defining structure. The sub-pixel includes a light-emitting functional layer. The pixel defining pattern includes first openings and second openings, a portion in the defining structure exposed by the second opening is configured to isolate the light-emitting functional layer. The sub-pixels include a first sub-pixel and a second sub-pixel, a turn-on voltage of the first sub-pixel is higher than that of the second sub-pixel; the defining structure includes a first defining structure surrounding the second sub-pixel and a second defining structure surrounding the second sub-pixel; the first defining structure is not exposed by the second opening; or a proportion of the first defining structure exposed by the second opening is less than a proportion of the second defining structure exposed by the second opening.
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公开(公告)号：US20250023537A1
公开(公告)日：2025-01-16
申请号：US18279530
申请日：2022-07-26
Inventor： Xiyuan WANG
Abstract: The present disclosure provides a bulk acoustic wave resonator, a method for manufacturing a bulk acoustic wave resonator and an electronic device, and belongs to the field of communication technology. The bulk acoustic wave resonator of the present disclosure includes: a first base substrate, a first electrode, a piezoelectric layer, and a second electrode; the first electrode is on the first base substrate, the second electrode is on a side of the first electrode away from the first base substrate, the piezoelectric layer is between the first electrode and the second electrode; and orthographic projections of any two of the first electrode, the piezoelectric layer and the second electrode on the first base substrate at least partially overlap with each other; wherein an acoustic velocity of a material of the piezoelectric layer is no less than 18000 m/s.
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