METHOD FOR PRODUCING AN INTEGRATED CIRCUIT HAVING SEMICONDUCTOR ZONES WITH A STEEP DOPING PROFILE
    31.
    发明申请
    METHOD FOR PRODUCING AN INTEGRATED CIRCUIT HAVING SEMICONDUCTOR ZONES WITH A STEEP DOPING PROFILE 有权
    用于生成具有STEEP DOPING配置文件的具有半导体区域的集成电路的方法

    公开(公告)号:US20080044988A1

    公开(公告)日:2008-02-21

    申请号:US11675376

    申请日:2007-02-15

    IPC分类号: H01L21/425

    摘要: An integrated circuit and method, producing semiconductor zones with a steep doping profile is disclosed. In one embodiment, dopants are implanted in a region corresponding to the semiconductor zone to be formed and which has at least one topology process. During the subsequent laser irradiation for activating the dopants in the semiconductor zone, regions which are laterally directly adjacent to the semiconductor zone are protected against melting on account of the topology process.

    摘要翻译: 公开了一种制造具有陡峭掺杂分布的半导体区的集成电路和方法。 在一个实施例中,将掺杂剂注入到将要形成的半导体区域的区域中,并具有至少一个拓扑过程。 在用于激活半导体区域中的掺杂剂的随后的激光照射期间,横向直接邻近半导体区域的区域由于拓扑过程被保护而不熔化。

    Power Semiconductor Device
    32.
    发明申请
    Power Semiconductor Device 有权
    功率半导体器件

    公开(公告)号:US20070246791A1

    公开(公告)日:2007-10-25

    申请号:US11379492

    申请日:2006-04-20

    IPC分类号: H01L23/58

    摘要: A The semiconductor device has a heavily doped substrate and an upper layer with doped silicon of a first conductivity type disposed on the substrate, the upper layer having an upper surface and including an active region that comprises a well region of a second, opposite conductivity type. An edge termination zone has a junction termination extension (JTE) region of the second conductivity type, the region having portions extending away from the well region and a number of field limiting rings of the second conductivity type disposed at the upper surface in the junction termination extension region.

    摘要翻译: A半导体器件具有重掺杂衬底和设置在衬底上的具有第一导电类型的掺杂硅的上层,上层具有上表面并且包括有源区,该有源区包括第二相反导电类型的阱区 。 边缘终止区域具有第二导电类型的连接终止延伸区域(JTE)区域,该区域具有远离阱区域延伸的部分,以及设置在连接终端的上表面处的第二导电类型的多个场限制环 延伸区域。